Home
last modified time | relevance | path

Searched refs:mask (Results 151 – 175 of 837) sorted by relevance

12345678910>>...34

/Zephyr-latest/drivers/gpio/
Dgpio_mcp23xxx.c227 static int mcp23xxx_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) in mcp23xxx_port_set_masked_raw() argument
240 buf = (buf & ~mask) | (mask & value); in mcp23xxx_port_set_masked_raw()
251 static int mcp23xxx_port_set_bits_raw(const struct device *dev, uint32_t mask) in mcp23xxx_port_set_bits_raw() argument
253 return mcp23xxx_port_set_masked_raw(dev, mask, mask); in mcp23xxx_port_set_bits_raw()
256 static int mcp23xxx_port_clear_bits_raw(const struct device *dev, uint32_t mask) in mcp23xxx_port_clear_bits_raw() argument
258 return mcp23xxx_port_set_masked_raw(dev, mask, 0); in mcp23xxx_port_clear_bits_raw()
261 static int mcp23xxx_port_toggle_bits(const struct device *dev, uint32_t mask) in mcp23xxx_port_toggle_bits() argument
274 buf ^= mask; in mcp23xxx_port_toggle_bits()
Dgpio_cy8c95xx.c163 gpio_port_pins_t mask, in port_write() argument
170 uint8_t out = ((*outp & ~mask) | (value & mask)) ^ toggle; in port_write()
187 mask, value, toggle, out, rc); in port_write()
193 gpio_port_pins_t mask, in port_set_masked() argument
196 return port_write(dev, mask, value, 0); in port_set_masked()
Dgpio_sc18im704.c48 uint8_t mask, uint8_t value, uint8_t toggle) in gpio_sc18im_port_set_raw() argument
63 buf[1] &= ~mask; in gpio_sc18im_port_set_raw()
64 buf[1] |= (value & mask); in gpio_sc18im_port_set_raw()
221 gpio_port_pins_t mask, in gpio_sc18im_port_set_masked_raw() argument
224 return gpio_sc18im_port_set_raw(port, (uint8_t)mask, (uint8_t)value, 0); in gpio_sc18im_port_set_masked_raw()
Dgpio_nct38xx_alert.c62 uint16_t alert, mask; in nct38xx_alert_is_active() local
73 (uint8_t *)&mask, sizeof(mask)); in nct38xx_alert_is_active()
78 alert &= mask; in nct38xx_alert_is_active()
Dgpio_tca6424a.c341 static int tca6424a_port_set_masked_raw(const struct device *dev, gpio_port_pins_t mask, in tca6424a_port_set_masked_raw() argument
356 reg_out = (reg_out & ~mask) | (mask & value); in tca6424a_port_set_masked_raw()
365 static int tca6424a_port_set_bits_raw(const struct device *dev, gpio_port_pins_t mask) in tca6424a_port_set_bits_raw() argument
367 return tca6424a_port_set_masked_raw(dev, mask, mask); in tca6424a_port_set_bits_raw()
370 static int tca6424a_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t mask) in tca6424a_port_clear_bits_raw() argument
372 return tca6424a_port_set_masked_raw(dev, mask, 0); in tca6424a_port_clear_bits_raw()
375 static int tca6424a_port_toggle_bits(const struct device *dev, gpio_port_pins_t mask) in tca6424a_port_toggle_bits() argument
389 reg_out ^= mask; in tca6424a_port_toggle_bits()
/Zephyr-latest/tests/drivers/gpio/gpio_api_1pin/src/
Dtest_port.c15 gpio_port_pins_t mask, in port_get_raw_and_verify() argument
22 zassert_equal(val_expected & mask, val_actual & mask, in port_get_raw_and_verify()
27 gpio_port_pins_t mask, in port_get_and_verify() argument
34 zassert_equal(val_expected & mask, val_actual & mask, in port_get_and_verify()
39 gpio_port_pins_t mask, in port_set_masked_raw_and_verify() argument
42 zassert_equal(gpio_port_set_masked_raw(port, mask, value), 0, in port_set_masked_raw_and_verify()
48 gpio_port_pins_t mask, in port_set_masked_and_verify() argument
51 zassert_equal(gpio_port_set_masked(port, mask, value), 0, in port_set_masked_and_verify()
/Zephyr-latest/drivers/rtc/
Drtc_pcf8523.c436 static int pcf8523_alarm_get_supported_fields(const struct device *dev, uint16_t id, uint16_t *mask) in pcf8523_alarm_get_supported_fields() argument
445 *mask = PCF8523_RTC_ALARM_TIME_MASK; in pcf8523_alarm_get_supported_fields()
450 static int pcf8523_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask, in pcf8523_alarm_set_time() argument
460 if ((mask & ~(PCF8523_RTC_ALARM_TIME_MASK)) != 0U) { in pcf8523_alarm_set_time()
461 LOG_ERR("unsupported alarm field mask 0x%04x", mask); in pcf8523_alarm_set_time()
465 if ((mask & RTC_ALARM_TIME_MASK_MINUTE) != 0U) { in pcf8523_alarm_set_time()
471 if ((mask & RTC_ALARM_TIME_MASK_HOUR) != 0U) { in pcf8523_alarm_set_time()
477 if ((mask & RTC_ALARM_TIME_MASK_MONTHDAY) != 0U) { in pcf8523_alarm_set_time()
483 if ((mask & RTC_ALARM_TIME_MASK_WEEKDAY) != 0U) { in pcf8523_alarm_set_time()
491 timeptr->tm_min, mask); in pcf8523_alarm_set_time()
[all …]
/Zephyr-latest/drivers/sensor/ite/ite_tach_it8xxx2/
Dtach_ite_it8xxx2.c92 int mask = (dvs_bit | chsel_bit); in tach_ch_is_valid() local
97 if ((*reg_tswctlr & mask) == dvs_bit) { in tach_ch_is_valid()
102 if ((*reg_tswctlr & mask) == mask) { in tach_ch_is_valid()
/Zephyr-latest/drivers/pwm/
Dpwm_ite_it8801.c90 uint8_t duty, mask; in pwm_it8801_set_cycles() local
94 mask = it8801_pwm_gpio_map[ch].pushpull_en; in pwm_it8801_set_cycles()
96 ret = i2c_reg_update_byte_dt(&config->i2c_dev, IT8801_REG_PWMODDSR, mask, mask); in pwm_it8801_set_cycles()
/Zephyr-latest/subsys/net/lib/sockets/
Dsockets_internal.h23 static inline void sock_set_flag(struct net_context *ctx, uintptr_t mask, in sock_set_flag() argument
28 val = (val & ~mask) | flag; in sock_set_flag()
32 static inline uintptr_t sock_get_flag(struct net_context *ctx, uintptr_t mask) in sock_get_flag() argument
34 return POINTER_TO_UINT(ctx->socket_data) & mask; in sock_get_flag()
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dstm32l0_clock.h56 #define STM32_DOMAIN_CLOCK(val, mask, shift, reg) \ argument
59 (((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
Dstm32f0_clock.h55 #define STM32_DOMAIN_CLOCK(val, mask, shift, reg) \ argument
58 (((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
Dstm32f4_clock.h68 #define STM32_DOMAIN_CLOCK(val, mask, shift, reg) \ argument
71 (((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
Dstm32c0_clock.h54 #define STM32_DOMAIN_CLOCK(val, mask, shift, reg) \ argument
57 (((mask) & STM32_CLOCK_MASK_MASK) << STM32_CLOCK_MASK_SHIFT) | \
/Zephyr-latest/drivers/sensor/nxp/fxos8700/
Dfxos8700_trigger.c202 uint8_t mask; in fxos8700_trigger_set() local
209 mask = FXOS8700_DRDY_MASK; in fxos8700_trigger_set()
215 mask = FXOS8700_PULSE_MASK; in fxos8700_trigger_set()
220 mask = FXOS8700_PULSE_MASK; in fxos8700_trigger_set()
227 mask = FXOS8700_MOTION_MASK; in fxos8700_trigger_set()
234 mask = FXOS8700_VECM_MASK; in fxos8700_trigger_set()
263 if (config->ops->reg_field_update(dev, FXOS8700_REG_CTRLREG4, mask, in fxos8700_trigger_set()
264 handler ? mask : 0)) { in fxos8700_trigger_set()
/Zephyr-latest/drivers/sensor/maxim/max31875/
Dmax31875.c97 static uint16_t set_config_flags(struct max31875_data *data, uint16_t mask, in set_config_flags() argument
100 return (data->config_reg & ~mask) | (value & mask); in set_config_flags()
103 static int max31875_update_config(const struct device *dev, uint16_t mask, uint16_t val) in max31875_update_config() argument
108 const uint16_t new_val = set_config_flags(data, mask, val); in max31875_update_config()
/Zephyr-latest/drivers/ieee802154/
Dieee802154_rf2xx_iface.c140 uint8_t mask, in rf2xx_iface_bit_read() argument
146 ret &= mask; in rf2xx_iface_bit_read()
154 uint8_t mask, in rf2xx_iface_bit_write() argument
161 current_reg_value &= ~mask; in rf2xx_iface_bit_write()
163 new_value &= mask; in rf2xx_iface_bit_write()
/Zephyr-latest/drivers/input/
Dinput_ite_it8xxx2_kbd.c30 uint8_t mask; member
200 config->wuc_map_list[i].mask, in it8xxx2_kbd_init()
204 config->wuc_map_list[i].mask); in it8xxx2_kbd_init()
207 config->wuc_map_list[i].mask); in it8xxx2_kbd_init()
216 data->ksi_pin_mask |= config->wuc_map_list[i].mask; in it8xxx2_kbd_init()
/Zephyr-latest/dts/riscv/nordic/
Dnrf54l_05_10_15_cpuflpr.dtsi37 nordic,tasks-mask = <0x007f0000>;
46 nordic,events-mask = <0x00100000>;
/Zephyr-latest/drivers/clock_control/
Dclock_control_lpc11u6x.c68 uint32_t mask, bool enable) in syscon_ahb_clock_enable() argument
71 syscon->sys_ahb_clk_ctrl |= mask; in syscon_ahb_clock_enable()
73 syscon->sys_ahb_clk_ctrl &= ~mask; in syscon_ahb_clock_enable()
78 uint32_t mask, bool reset) in syscon_peripheral_reset() argument
81 syscon->p_reset_ctrl &= ~mask; in syscon_peripheral_reset()
83 syscon->p_reset_ctrl |= mask; in syscon_peripheral_reset()
/Zephyr-latest/drivers/sensor/st/lsm6dsl/
Dlsm6dsl_spi.c114 uint8_t mask, uint8_t value) in lsm6dsl_spi_update_reg() argument
119 tmp_val = (tmp_val & ~mask) | (value & mask); in lsm6dsl_spi_update_reg()
/Zephyr-latest/drivers/sensor/ti/tmp007/
Dtmp007.c43 uint16_t mask, uint16_t val) in tmp007_reg_update() argument
52 new_val = old_val & ~mask; in tmp007_reg_update()
53 new_val |= val & mask; in tmp007_reg_update()
/Zephyr-latest/subsys/mgmt/osdp/src/
Dosdp_common.c153 uint32_t mask = 0; in osdp_get_sc_status_mask() local
160 mask |= 1 << i; in osdp_get_sc_status_mask()
163 return mask; in osdp_get_sc_status_mask()
/Zephyr-latest/drivers/serial/
Duart_pl011_ambiq.h177 sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
195 sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
196 while ((sys_read32(pwr_status_addr) & DT_INST_PHA(n, ambiq_pwrcfg, mask)) != \
197 DT_INST_PHA(n, ambiq_pwrcfg, mask)) { \
/Zephyr-latest/drivers/sensor/nxp/fxas21002/
Dfxas21002_trigger.c103 uint8_t mask; in fxas21002_trigger_set() local
114 mask = FXAS21002_CTRLREG2_CFG_EN_MASK; in fxas21002_trigger_set()
142 if (config->ops->reg_field_update(dev, FXAS21002_REG_CTRLREG2, mask, in fxas21002_trigger_set()
143 handler ? mask : 0)) { in fxas21002_trigger_set()

12345678910>>...34