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/Zephyr-latest/boards/st/stm32mp157c_dk2/
Darduino_r3_connector.dtsi9 compatible = "arduino-header-r3";
/Zephyr-latest/boards/st/nucleo_h503rb/
Darduino_r3_connector.dtsi9 compatible = "arduino-header-r3";
/Zephyr-latest/boards/st/stm32h7b3i_dk/
Darduino_r3_connector.dtsi9 compatible = "arduino-header-r3";
/Zephyr-latest/soc/nxp/imxrt/
DKconfig17 # requires the boot header is SOC specific.
19 bool "Boot header"
87 This is a new alternative boot header compared to DCD, and DCD must be disabled
124 generated header specifying the VMA and LMA of each memory section
/Zephyr-latest/soc/nuvoton/npcx/
DKconfig9 bool "The output binary with NPCX binary header"
12 to RAM by the firmware binary header setting. Enable this to invoke
13 the 'ecst' which generates the NPCX firmware header.
127 When enabled, the header will be verified at boot using a crc
/Zephyr-latest/samples/bluetooth/mtu_update/
DREADME.rst14 | Set :kconfig:option:`CONFIG_BT_BUF_ACL_RX_SIZE` to at least x + L2CAP header
16 | Set :kconfig:option:`CONFIG_BT_BUF_ACL_RX_SIZE` to at least x + L2CAP header +
51 L2CAP header size.
55 L2CAP header size.
/Zephyr-latest/subsys/usb/device/
DKconfig87 default y if BT_BUF_ACL_RX_SIZE > 123 # 4 byte header
88 default y if BT_BUF_ACL_TX_SIZE > 123 # 4 byte header
89 default y if BT_BUF_EVT_RX_SIZE > 125 # 2 byte header
90 default y if BT_BUF_CMD_TX_SIZE > 124 # 3 byte header
/Zephyr-latest/boards/infineon/xmc47_relax_kit/
Darduino_r3_connector.dtsi8 compatible = "arduino-header-r3";
/Zephyr-latest/boards/m5stack/m5stack_core2/
Dm5stack_mbus_connectors.dtsi8 compatible = "m5stack,mbus-header";
/Zephyr-latest/boards/st/stm32h745i_disco/
Darduino_r3_connector.dtsi10 compatible = "arduino-header-r3";
/Zephyr-latest/boards/adafruit/feather_m0_basic_proto/
Dfeather_connector.dtsi10 compatible = "adafruit-feather-header";
/Zephyr-latest/boards/m5stack/m5stack_cores3/
Dm5stack_mbus_connectors.dtsi8 compatible = "m5stack,mbus-header";
/Zephyr-latest/tests/drivers/i2c/i2c_target_api/boards/
Dnucleo_h563zi.overlay6 /* I2C bus pins are exposed on the ST morpho header.
Dnucleo_f091rc.overlay3 /* I2C bus pins are exposed on the ST morpho header.
/Zephyr-latest/doc/develop/manifest/external/
Dcannectivity.rst42 the CANnectivity firmware application by including its header:
48 Please see the header file for the API details.
/Zephyr-latest/boards/silabs/radio_boards/
Dindex.rst46 - 20 pin 2.54mm expansion header
58 - 20 pin 2.54mm expansion header
/Zephyr-latest/cmake/modules/
Dunittest.cmake62 # Generates empty header files to build
79 foreach(header ${INCL_GENERATED_HEADERS})
80 file(TOUCH ${header})
/Zephyr-latest/boards/atmel/sam/sam4e_xpro/
Dsam4e_xpro.dts52 compatible = "atmel-xplained-pro-header";
77 compatible = "atmel-xplained-pro-header";
102 compatible = "atmel-xplained-pro-header";
/Zephyr-latest/subsys/net/ip/
Dtp.c57 mem->header = TP_MEM_HEADER_COOKIE; in tp_malloc()
88 if (mem->header != TP_MEM_HEADER_COOKIE || in tp_mem_chk()
94 dump(&mem->header, sizeof(mem->header)); in tp_mem_chk()
98 tp_assert(mem->header == TP_MEM_HEADER_COOKIE, in tp_mem_chk()
101 mem->header); in tp_mem_chk()
/Zephyr-latest/boards/seeed/wio_terminal/
Draspberrypi_40pins_connector.dtsi8 compatible = "raspberrypi-40pins-header";
/Zephyr-latest/soc/openisa/rv32m1/
Dvector_table.ld17 * end of the image header of the MCUboot. After the target image is
/Zephyr-latest/boards/st/nucleo_g031k8/
Darduino_nano_r3_connector.dtsi8 compatible = "arduino-nano-header-r3";
/Zephyr-latest/boards/arduino/nano_33_iot/
Darduino_nano_r3_connector.dtsi8 compatible = "arduino-nano-header-r3";
/Zephyr-latest/boards/arduino/mkrzero/
Darduino_mkr_connector.dtsi8 compatible = "arduino-mkr-header";
/Zephyr-latest/boards/arduino/nano_33_ble/
Darduino_nano_r3_connector.dtsi8 compatible = "arduino-nano-header-r3";

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