1# Copyright 2024-2025 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4config SOC_FAMILY_NXP_IMXRT
5	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
6
7if SOC_FAMILY_NXP_IMXRT
8
9# Source series Kconfig files first, so SOCs
10# can override the defaults given here
11rsource "*/Kconfig"
12
13if DT_HAS_NXP_IMX_FLEXSPI_ENABLED
14rsource "../common/Kconfig.flexspi_xip"
15endif
16
17if DT_HAS_NXP_XSPI_ENABLED
18rsource "../common/Kconfig.xspi_xip"
19endif
20
21# Note- When SECOND_CORE_MCUX is set, the dependencies for this Kconfig
22# should be set elsewhere, since the determination of which SOC core
23# requires the boot header is SOC specific.
24config NXP_IMXRT_BOOT_HEADER
25	bool "Boot header"
26	default y
27	depends on !(BOOTLOADER_MCUBOOT || SECOND_CORE_MCUX)
28	help
29	  Enable data structures required by the boot ROM to boot the
30	  application from an external flash device.
31
32if NXP_IMXRT_BOOT_HEADER
33
34rsource "../common/Kconfig.rom_loader"
35
36choice BOOT_DEVICE
37	prompt "Boot device"
38	default BOOT_XSPI_NOR if DT_HAS_NXP_XSPI_ENABLED
39	default BOOT_FLEXSPI_NOR
40
41config BOOT_XSPI_NOR
42	bool "XPI serial NOR"
43	depends on DT_HAS_NXP_XSPI_ENABLED
44
45config BOOT_FLEXSPI_NOR
46	bool "FlexSPI serial NOR"
47	depends on HAS_MCUX_FLEXSPI
48
49config BOOT_FLEXSPI_NAND
50	bool "FlexSPI serial NAND"
51	depends on HAS_MCUX_FLEXSPI
52
53config BOOT_SEMC_NOR
54	bool "SEMC parallel NOR"
55	depends on HAS_MCUX_SEMC
56
57config BOOT_SEMC_NAND
58	bool "SEMC parallel NAND"
59	depends on HAS_MCUX_SEMC
60
61endchoice # BOOT_DEVICE
62
63if BOOT_FLEXSPI_NOR
64
65config FLEXSPI_CONFIG_BLOCK_OFFSET
66	hex "FlexSPI config block offset"
67	default 0x0 if BOOT_FLEXSPI_NOR
68	default 0x400
69	help
70	  FlexSPI configuration block consists of parameters regarding specific
71	  flash devices including read command sequence, quad mode enablement
72	  sequence (optional), etc. The boot ROM expects FlexSPI configuration
73	  parameter to be presented in serial nor flash.
74
75endif # BOOT_FLEXSPI_NOR
76
77if BOOT_XSPI_NOR
78
79config XSPI_CONFIG_BLOCK_OFFSET
80	hex "XSPI config block offset"
81	default 0x0
82	help
83	  XSPI configuration block consists of parameters regarding specific
84	  flash devices including read command sequence, quad mode enablement
85	  sequence (optional), etc. The boot ROM expects XSPI configuration
86	  parameter to be presented in serial nor flash.
87
88endif # BOOT_XSPI_NOR
89
90config IMAGE_VECTOR_TABLE_OFFSET
91	hex "Image vector table offset"
92	default 0x1000 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
93	default 0x400 if BOOT_FLEXSPI_NAND || BOOT_SEMC_NAND
94	help
95	  The Image Vector Table (IVT) provides the boot ROM with pointers to
96	  the application entry point and device configuration data. The boot
97	  ROM requires a fixed IVT offset for each type of boot device.
98
99config DEVICE_CONFIGURATION_DATA
100	bool "Device configuration data"
101	help
102	  Device configuration data (DCD) provides a sequence of commands to
103	  the boot ROM to initialize components such as an SDRAM. This is
104	  useful if your application expects components like SDRAM to be
105	  initialized at boot time.
106
107config EXTERNAL_MEM_CONFIG_DATA
108	bool "External Memory Configuration Data"
109	depends on !DEVICE_CONFIGURATION_DATA
110	help
111	  External memory configuration data (XMDC) provides an alternative
112	  configuration sequences which allows to intilialize the external memory
113	  at the boot time. This sequence allows to configure
114	  external memories (such as SDRAM) with more advanced option.
115	  This is a new alternative boot header compared to DCD, and DCD must be disabled
116	  in order to select this option.
117
118config EXTERNAL_MEM_CONFIG_OFFSET
119	hex "External memory configuration offset"
120	depends on EXTERNAL_MEM_CONFIG_DATA
121	default 0x800 if SOC_SERIES_IMXRT118X
122	default 0x1040 if BOOT_FLEXSPI_NOR || BOOT_SEMC_NOR
123	help
124	  As specified by the boot ROM, the External Memory configuration data must be
125	  placed in a specific address location to be pointed by the boot ROM.
126
127endif # NXP_IMXRT_BOOT_HEADER
128
129config NXP_IMX_EXTERNAL_SDRAM
130	bool "Allow access to external SDRAM region"
131	help
132	  Enable access to external SDRAM region managed by the SEMC. This
133	  setting should be enabled when the application uses SDRAM, or
134	  an MPU region will be defined to disable cached access to the
135	  SDRAM memory space.
136
137config NXP_IMX_EXTERNAL_HYPERRAM
138	bool "Allow access to external HYPERRAM region"
139	help
140	  Enable access to external HYPERRAM region managed by the FLEXSPI.
141	  This setting should be enabled when the application uses HYPERRAM,
142	  or an MPU region will be defined to disable cached access to the
143	  HYPERRAM memory space.
144
145config SECOND_CORE_MCUX
146	bool "Dual core operation on the RT11xx series"
147	depends on SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
148	help
149	  Indicates the second core will be enabled, and the part will run
150	  in dual core mode. Enables dual core operation on the RT11xx series,
151	  by booting an image targeting the Cortex-M4 from the Cortex-M7 CPU.
152	  The M4 image will be loaded from flash into RAM based off a
153	  generated header specifying the VMA and LMA of each memory section
154	  to load
155
156config SECOND_CORE_MCUX_REMOTE_DIR
157	string "Directory to with output image header from second core"
158	depends on SECOND_CORE_MCUX
159	help
160	  Sets the remote directory to include the output image header data
161	  from when launching a second core image
162
163if SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
164
165config PM_MCUX_GPC
166	bool "MCUX general power controller driver"
167
168config PM_MCUX_DCDC
169	bool "MCUX dcdc converter module driver"
170
171config PM_MCUX_PMU
172	bool "MCUX power management unit driver"
173
174config ADJUST_DCDC
175	default y
176	bool "Adjust internal DCDC output"
177
178config DCDC_VALUE
179	hex "DCDC value for VDD_SOC"
180
181config INIT_ARM_PLL
182	bool "Initialize ARM PLL"
183
184config INIT_VIDEO_PLL
185	bool "Initialize Video PLL"
186
187config INIT_ENET_PLL
188	bool
189	help
190	  If y, the Ethernet PLL is initialized. Always enabled on e.g.
191	  MIMXRT1021 - see commit 17f4d6bec7 ("soc: nxp_imx: fix ENET_PLL selection
192	  for MIMXRT1021").
193
194config INIT_SYS_PLL
195	bool "Initialize System PLL"
196
197endif # SOC_SERIES_IMXRT10XX || SOC_SERIES_IMXRT11XX || SOC_SERIES_IMXRT118X
198
199endif # SOC_FAMILY_NXP_IMXRT
200