Searched refs:has (Results 276 – 300 of 1361) sorted by relevance
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| /Zephyr-latest/cmake/compiler/arcmwdt/ |
| D | generic.cmake | 30 # Regular version has format: "T-2022.06"
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| /Zephyr-latest/samples/drivers/mspi/mspi_async/ |
| D | README.rst | 18 The application will build only for a target that has a :ref:`devicetree <dt-guide>`
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| /Zephyr-latest/drivers/dac/ |
| D | Kconfig.renesas_ra | 24 depends on $(dt_nodelabel_bool_prop,dac_global,has-davrefcr)
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| /Zephyr-latest/tests/drivers/flash/common/boards/ |
| D | nrf52840dk_spi_nor.overlay | 44 has-dpd;
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| /Zephyr-latest/doc/kernel/services/ |
| D | interrupts.rst | 10 Thread execution resumes only once all ISR work has been completed.
22 An ISR has the following key properties:
37 allows the function to determine which interrupt has been signaled.
44 priority ISR resumes execution once the higher priority ISR has completed
47 An ISR executes in the kernel's **interrupt context**. This context has its
94 * LEVEL 1 has 12 interrupt lines, with two lines (2 and 9) connected
96 * One of the LEVEL 2 controllers has interrupt line 5 connected to
98 * The other LEVEL 2 controller has no nested controllers but has one
100 * The LEVEL 3 controller has one device 'D' on line 2.
116 controller has device D on line 2, connected to the LEVEL 2 controller's line
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| /Zephyr-latest/drivers/flash/ |
| D | Kconfig | 25 with random value, in place where it has already been programmed with
28 All pure Flash devices are evolution of EEPROM where erase has
29 been separated from write, EEPROM has erase-on-write, giving
49 a new random value at any location that has been previously
163 priority is used unless the driver implementation has its own
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| /Zephyr-latest/doc/services/storage/zms/ |
| D | zms.rst | 88 ``GC_done ATE`` is written to indicate that the next sector has already been garbage-collected.
115 * erase-blocks if the device has erase capabilities
128 As ZMS has a fast-forward write mechanism, it must find the last sector and the last pointer of
141 If the sector is full (cannot hold the current data + ATE), ZMS has to move to the next sector,
165 Each sector has a lead cycle counter which is a ``uin8_t`` that is used to validate all the other
180 When closing a sector, all the remaining space that has not been used is filled with garbage data
199 An entry has 16 bytes divided between these fields:
225 ZMS has an entry size of 16 bytes which means that the maximum available space in a partition to
256 For a partition that has 4 sectors of 1024 bytes and for data size of 64 bytes.
296 minute. The partition has 4 sectors with 1024 bytes each.
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| /Zephyr-latest/doc/connectivity/bluetooth/api/ |
| D | hci.txt | 139 Each hardware platform has its own variant namespace.
244 When the Read_Version_Information command has completed, a Command Complete
287 When the Read_Supported_Commands command has completed, a Command Complete
322 When the Read_Supported_Features command has completed, a Command Complete
340 that bit will be enabled. The Host has to deal with each event that is
364 When the Set_Event_Mask command has completed, a Command Complete event shall
381 event related to the Reset command has been received.
406 When the Reset command has completed, a Command Complete event shall be
445 When the Write_BD_ADDR command has completed, a Command Complete event shall
497 When the Set_Trace_Enable command has completed, a Command Complete event shall
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| /Zephyr-latest/boards/st/nucleo_f207zg/doc/ |
| D | index.rst | 71 Nucleo F207ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
119 Nucleo F207ZG board has 4 UARTs. The Zephyr console output is assigned to UART3.
129 Nucleo F207ZG board has a USB OTG dual-role device (DRD) controller that
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| /Zephyr-latest/boards/st/nucleo_f401re/doc/ |
| D | index.rst | 64 Nucleo F401RE Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
99 Nucleo F401RE board has 3 UARTs. The Zephyr console output is assigned to UART2.
105 Nucleo F401RE board has up to 3 I2Cs. The default I2C mapping for Zephyr is:
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| /Zephyr-latest/boards/atmel/sam/sam_e70_xplained/doc/ |
| D | index.rst | 35 The `SAME70-XPLD User Guide`_ has detailed information about board connections.
46 The ATSAME70Q21 MCU has five UARTs and three USARTs. One of the USARTs is
62 If your chip has a security bit GPNVM0 set you will be unable to program flash
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| /Zephyr-latest/boards/atmel/sam/sam4e_xpro/doc/ |
| D | index.rst | 35 The `SAM4E Xplained Pro User Guide`_ has detailed information about board
47 The ATSAM4E16E MCU has 2 UARTs and 2 USARTs. One of the UARTs (UART0) is
60 If your chip has a security bit GPNVM0 set you will be unable to program flash
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| /Zephyr-latest/boards/atmel/sam/sam_v71_xult/doc/ |
| D | index.rst | 41 The `SAMV71-XULT User Guide`_ has detailed information about board
53 The ATSAMV71Q21 MCU has five UARTs and three USARTs. USART1 is configured
65 If your chip has a security bit GPNVM0 set you will be unable to program flash
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| /Zephyr-latest/boards/weact/stm32g431_core/doc/ |
| D | index.rst | 24 PD signaling unless dead battery support has been enabled. A USB-C to USB-A adapter or
73 The board has two external oscillators. The frequency of the slow clock (LSE) is 32.768
86 pull-downs have been disconnected by opening SB8 and SB9 unless dead battery support has
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| /Zephyr-latest/doc/services/storage/disk/ |
| D | access.rst | 43 Zephyr has support for some SD card controllers and support for interfacing
67 at 24 MHz once the SD card has been initialized:
98 Zephyr also has support for eMMC devices using the Disk Access API.
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| /Zephyr-latest/boards/seeed/wio_terminal/doc/ |
| D | index.rst | 46 The `Wio Terminal Getting started guide`_ has detailed information about the
64 The SAMD51 MCU has a USB device port that can be used to communicate with a
78 reboots on the new firmware after the UF2 file has finished transferring.
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| /Zephyr-latest/doc/kernel/services/synchronization/ |
| D | events.rst | 17 on an event object until the desired set of events has been delivered to the
21 An event object has the following key properties:
65 The following code has the same effect as the code segment above.
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| /Zephyr-latest/boards/st/nucleo_f413zh/doc/ |
| D | index.rst | 68 Nucleo F413ZH Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
113 Nucleo F413ZH board has 10 UARTs. The Zephyr console output is assigned to UART3.
118 Nucleo F413ZH board has a USB OTG dual-role device (DRD) controller that
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| /Zephyr-latest/boards/st/nucleo_g431kb/doc/ |
| D | index.rst | 38 Nucleo G431KB Board has 6 GPIO controllers. These controllers are responsible for pin muxing,
66 Nucleo G431KB board has 1 U(S)ARTs and one LPUART. The Zephyr console output is assigned to LPUART1.
95 To enable support of the STM32G431KB SoC in pyOCD, its pack has to be installed first:
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| /Zephyr-latest/boards/adafruit/feather_nrf52840/doc/ |
| D | index.rst | 70 The `Adafruit Feather nRF52840 Express Learn site`_ has
76 The `Adafruit Feather nRF52840 Sense Learn site`_ has
100 using the SWD headers. Only the Express board has an SWD connector however.
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| /Zephyr-latest/doc/kernel/data_structures/ |
| D | dlist.rst | 11 pointers per node, and thus has somewhat higher runtime code and
48 implementation that has zero overhead vs. the normal list processing).
60 * An empty list has backpointers to itself in the list struct, which
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| /Zephyr-latest/soc/espressif/esp32c3/ |
| D | Kconfig | 26 ESP32-C3 revision v1.1 has updated ROM functions for Wi-Fi and BLE that
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| /Zephyr-latest/drivers/serial/ |
| D | Kconfig.rtt | 25 …Enable UART on (default) RTT channel 0. Default channel has to be configured in non-blocking skip …
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| /Zephyr-latest/drivers/ieee802154/ |
| D | Kconfig.rf2xx | 30 might need it too). And of course it has to start before the net stack.
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| /Zephyr-latest/boards/ti/common/ |
| D | launchxl_sky13317.dtsi | 9 * The CC1352P LAUNCHXL has an on-board antenna switch (SKY13317-373LF) used to select the
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