Searched refs:default (Results 4626 – 4650 of 5614) sorted by relevance
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/Zephyr-latest/tests/subsys/mgmt/mcumgr/handler_demo/ |
D | Kconfig | 17 default y
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/Zephyr-latest/tests/drivers/flash/common/boards/ |
D | nrf52840dk_spi_nor.overlay | 36 pinctrl-names = "default", "sleep";
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/Zephyr-latest/tests/drivers/pinctrl/gd32/boards/ |
D | gd32f450i_eval.overlay | 10 pinctrl-names = "default";
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/Zephyr-latest/arch/arm64/ |
D | Kconfig | 10 default "arm64"
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/Zephyr-latest/boards/espressif/esp_wrover_kit/doc/ |
D | index.rst | 23 … ESP32's GPIO16 and GPIO17 are used as chip select and clock signals for PSRAM. By default, the two 87 | | out to the inward and outward sides of JP2 respectively. By default, | 92 | SPI | By default, ESP32 uses its SPI interface to access flash and PSRAM | 98 | | circuitry by default. To enable them, short the respective pins of JP14 | 102 | | the inward and outward sides of JP2 respectively. By default, these | 270 Since GPIO32 and GPIO33 are connected to the oscillator by default, they are not connected to 508 It is the default option when building the application without additional configuration. 528 to the board default configuration file. 550 By default, the ESP32 sysbuild creates bootloader (MCUboot) and application 629 controller (the default is to leave them disconnected). The jumper [all …]
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/Zephyr-latest/boards/seeed/lora_e5_dev_board/doc/ |
D | lora_e5_dev_board.rst | 45 - Delivered with SMA antenna (per default IPEX connector is disconnected) 107 The default configuration can be found in: 162 The board has multiple power rails, which are always turned on in the default 193 By default System clock is driven by the MSI clock at 48MHz. 241 Per default the console on ``usart1`` is available on the USB Type C connector
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/Zephyr-latest/boards/vcc-gnd/yd_esp32/doc/ |
D | index.rst | 117 It is the default option when building the application without additional configuration. 137 to the board default configuration file. 159 By default, the ESP32 sysbuild creates bootloader (MCUboot) and application 303 .. _`ESP32 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_… 304 .. _`ESP32 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/esp…
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/Zephyr-latest/doc/_scripts/ |
D | gen_devicetree_rest.py | 50 def bindings(self, vnd, default=None): argument 51 return self.vnd2bindings.get(vnd, default) 176 parser.add_argument('-v', '--verbose', default=0, action='count', 183 parser.add_argument('--dts-folder', dest='dts_folders', action='append', default=[], 729 if prop_spec.default:
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/Zephyr-latest/boards/luatos/esp32s3_luatos_core/doc/ |
D | index.rst | 143 It is the default option when building the application without additional configuration. 163 to the board default configuration file. 185 By default, the ESP32 sysbuild creates bootloader (MCUboot) and application 292 .. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-mini… 293 .. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentat…
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/Zephyr-latest/boards/espressif/esp32s3_devkitc/doc/ |
D | index.rst | 141 It is the default option when building the application without additional configuration. 161 to the board default configuration file. 183 By default, the ESP32 sysbuild creates bootloader (MCUboot) and application 282 .. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-wroo… 283 .. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentat…
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/Zephyr-latest/boards/espressif/esp32s3_devkitm/doc/ |
D | index.rst | 141 It is the default option when building the application without additional configuration. 161 to the board default configuration file. 183 By default, the ESP32 sysbuild creates bootloader (MCUboot) and application 282 .. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-mini… 283 .. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentat…
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/Zephyr-latest/boards/segger/ip_k66f/doc/ |
D | index.rst | 55 The default configuration can be found in 95 configured by default to use the :ref:`opensda-jlink-onboard-debug-probe`. 108 The default flasher is ``jlink`` using the built-in SEGGER Jlink interface.
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/Zephyr-latest/boards/st/nucleo_f412zg/doc/ |
D | index.rst | 88 The default configuration can be found in 134 as well as main PLL clock. By default System clock is driven by PLL clock at 96MHz, 146 Ethernet over USB is configured as the default network interface
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/Zephyr-latest/boards/fanke/fk750m1_vbt6/doc/ |
D | index.rst | 76 The default configuration per core can be found in 100 as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 480MHz, 106 The Zephyr console output is assigned to UART1. The default communication settings are 115200 8N1.
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/Zephyr-latest/subsys/debug/gdbstub/ |
D | Kconfig | 33 default 256
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/Zephyr-latest/scripts/support/ |
D | quartus-flash.py | 129 default="USB-BlasterII")
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/Zephyr-latest/drivers/timer/ |
D | Kconfig.cavs | 19 default y
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/Zephyr-latest/drivers/led/ |
D | Kconfig | 19 default 90
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/Zephyr-latest/drivers/usb_c/tcpc/ |
D | Kconfig | 15 default 80
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/Zephyr-latest/soc/espressif/esp32c3/ |
D | Kconfig | 32 default n
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/Zephyr-latest/cmake/toolchain/xcc/ |
D | common.cmake | 28 # the toolchain can have a default core configuration to use.
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/Zephyr-latest/boards/shields/arduino_uno_click/boards/ |
D | nrf9160dk_nrf9160_arduino_uno_click_common.dtsi | 30 * The default pin group for the nRF9160 DK includes RTS/CTS HW flow
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/Zephyr-latest/soc/st/stm32/stm32h7x/ |
D | Kconfig | 87 default y
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/Zephyr-latest/boards/ti/common/ |
D | launchxl_sky13317.dtsi | 31 pinctrl-names = "default", "ant_24g", "ant_24g_pa", "ant_subg", "ant_subg_pa";
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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
D | g0_i2c1_hsi_lptim1_lse_adc1_pllp.overlay | 8 * Aim is to avoid conflict with specific default board configuration
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