1.. zephyr:board:: esp32s3_devkitc
2
3Overview
4********
5
6The ESP32-S3-DevKitC is an entry-level development board equipped with either ESP32-S3-WROOM-1
7or ESP32-S3-WROOM-1U, a module named for its small size. This board integrates complete Wi-Fi
8and Bluetooth Low Energy functions. For more information, check `ESP32-S3-DevKitC`_.
9
10Hardware
11********
12
13ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi
14and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor
15(Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband,
16RF module, and numerous peripherals.
17
18ESP32-S3-DevKitC includes the following features:
19
20- Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz
21- Additional vector instructions support for AI acceleration
22- 512KB of SRAM
23- 384KB of ROM
24- Wi-Fi 802.11b/g/n
25- Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate
26
27Digital interfaces:
28
29- 45 programmable GPIOs
30- 4x SPI
31- 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411
32- 1x DVP 8-bit ~16-bit camera interface
33- 3x UART
34- 2x I2C
35- 2x I2S
36- 1x RMT (TX/RX)
37- 1x pulse counter
38- LED PWM controller, up to 8 channels
39- 1x full-speed USB OTG
40- 1x USB Serial/JTAG controller
41- 2x MCPWM
42- 1x SDIO host controller with 2 slots
43- General DMA controller (GDMA), with 5 transmit channels and 5 receive channels
44- 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)
45- Addressable RGB LED, driven by GPIO38.
46
47Analog interfaces:
48
49- 2x 12-bit SAR ADCs, up to 20 channels
50- 1x temperature sensor
51- 14x touch sensing IOs
52
53Timers:
54
55- 4x 54-bit general-purpose timers
56- 1x 52-bit system timer
57- 3x watchdog timers
58
59Low Power:
60
61- Power Management Unit with five power modes
62- Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM
63
64Security:
65
66- Secure boot
67- Flash encryption
68- 4-Kbit OTP, up to 1792 bits for users
69- Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)
70
71Asymmetric Multiprocessing (AMP)
72********************************
73
74ESP32S3-DevKitC allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core
75architecture, each core can be enabled to execute customized tasks in stand-alone mode
76and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as code reference.
77
78For more information, check the datasheet at `ESP32-S3 Datasheet`_ or the technical reference
79manual at `ESP32-S3 Technical Reference Manual`_.
80
81Supported Features
82==================
83
84Current Zephyr's ESP32-S3-DevKitC board supports the following features:
85
86+------------+------------+-------------------------------------+
87| Interface  | Controller | Driver/Component                    |
88+============+============+=====================================+
89| UART       | on-chip    | serial port                         |
90+------------+------------+-------------------------------------+
91| GPIO       | on-chip    | gpio                                |
92+------------+------------+-------------------------------------+
93| PINMUX     | on-chip    | pinmux                              |
94+------------+------------+-------------------------------------+
95| USB-JTAG   | on-chip    | hardware interface                  |
96+------------+------------+-------------------------------------+
97| SPI Master | on-chip    | spi                                 |
98+------------+------------+-------------------------------------+
99| TWAI/CAN   | on-chip    | can                                 |
100+------------+------------+-------------------------------------+
101| ADC        | on-chip    | adc                                 |
102+------------+------------+-------------------------------------+
103| Timers     | on-chip    | counter                             |
104+------------+------------+-------------------------------------+
105| Watchdog   | on-chip    | watchdog                            |
106+------------+------------+-------------------------------------+
107| TRNG       | on-chip    | entropy                             |
108+------------+------------+-------------------------------------+
109| LEDC       | on-chip    | pwm                                 |
110+------------+------------+-------------------------------------+
111| MCPWM      | on-chip    | pwm                                 |
112+------------+------------+-------------------------------------+
113| PCNT       | on-chip    | qdec                                |
114+------------+------------+-------------------------------------+
115| GDMA       | on-chip    | dma                                 |
116+------------+------------+-------------------------------------+
117| USB-CDC    | on-chip    | serial                              |
118+------------+------------+-------------------------------------+
119
120Prerequisites
121-------------
122
123Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
124below to retrieve those files.
125
126.. code-block:: console
127
128   west blobs fetch hal_espressif
129
130.. note::
131
132   It is recommended running the command above after :file:`west update`.
133
134Building & Flashing
135*******************
136
137Simple boot
138===========
139
140The board could be loaded using the single binary image, without 2nd stage bootloader.
141It is the default option when building the application without additional configuration.
142
143.. note::
144
145   Simple boot does not provide any security features nor OTA updates.
146
147MCUboot bootloader
148==================
149
150User may choose to use MCUboot bootloader instead. In that case the bootloader
151must be built (and flashed) at least once.
152
153There are two options to be used when building an application:
154
1551. Sysbuild
1562. Manual build
157
158.. note::
159
160   User can select the MCUboot bootloader by adding the following line
161   to the board default configuration file.
162
163   .. code:: cfg
164
165      CONFIG_BOOTLOADER_MCUBOOT=y
166
167Sysbuild
168========
169
170The sysbuild makes possible to build and flash all necessary images needed to
171bootstrap the board with the ESP32-S3 SoC.
172
173To build the sample application using sysbuild use the command:
174
175.. zephyr-app-commands::
176   :tool: west
177   :zephyr-app: samples/hello_world
178   :board: esp32s3_devkitc/esp32s3/procpu
179   :goals: build
180   :west-args: --sysbuild
181   :compact:
182
183By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
184images. But it can be configured to create other kind of images.
185
186Build directory structure created by sysbuild is different from traditional
187Zephyr build. Output is structured by the domain subdirectories:
188
189.. code-block::
190
191  build/
192  ├── hello_world
193  │   └── zephyr
194  │       ├── zephyr.elf
195  │       └── zephyr.bin
196  ├── mcuboot
197  │    └── zephyr
198  │       ├── zephyr.elf
199  │       └── zephyr.bin
200  └── domains.yaml
201
202.. note::
203
204   With ``--sysbuild`` option the bootloader will be re-build and re-flash
205   every time the pristine build is used.
206
207For more information about the system build please read the :ref:`sysbuild` documentation.
208
209Manual build
210============
211
212During the development cycle, it is intended to build & flash as quickly possible.
213For that reason, images can be built one at a time using traditional build.
214
215The instructions following are relevant for both manual build and sysbuild.
216The only difference is the structure of the build directory.
217
218.. note::
219
220   Remember that bootloader (MCUboot) needs to be flash at least once.
221
222Build and flash applications as usual (see :ref:`build_an_application` and
223:ref:`application_run` for more details).
224
225.. zephyr-app-commands::
226   :zephyr-app: samples/hello_world
227   :board: esp32s3_devkitc/esp32s3/procpu
228   :goals: build
229
230The usual ``flash`` target will work with the ``esp32s3_devkitc`` board
231configuration. Here is an example for the :zephyr:code-sample:`hello_world`
232application.
233
234.. zephyr-app-commands::
235   :zephyr-app: samples/hello_world
236   :board: esp32s3_devkitc/esp32s3/procpu
237   :goals: flash
238
239Open the serial monitor using the following command:
240
241.. code-block:: shell
242
243   west espressif monitor
244
245After the board has automatically reset and booted, you should see the following
246message in the monitor:
247
248.. code-block:: console
249
250   ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
251   Hello World! esp32s3_devkitc
252
253Debugging
254*********
255
256ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_.
257
258ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB cable connected to the D+/D- pins is necessary.
259
260Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_.
261
262Here is an example for building the :zephyr:code-sample:`hello_world` application.
263
264.. zephyr-app-commands::
265   :zephyr-app: samples/hello_world
266   :board: esp32s3_devkitc/esp32s3/procpu
267   :goals: build flash
268
269You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hello_world` application.
270
271.. zephyr-app-commands::
272   :zephyr-app: samples/hello_world
273   :board: esp32s3_devkitc/esp32s3/procpu
274   :goals: debug
275
276References
277**********
278
279.. target-notes::
280
281.. _`ESP32-S3-DevKitC`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/esp32s3/user-guide-devkitc-1.html
282.. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-wroom-1_wroom-1u_datasheet_en.pdf
283.. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
284.. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-guides/jtag-debugging/
285.. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases
286