1.. zephyr:board:: nucleo_f412zg
2
3Overview
4********
5
6The Nucleo F412ZG board features an ARM Cortex-M4 based STM32F412ZG MCU
7with a wide range of connectivity support and configurations. Here are
8some highlights of the Nucleo F412ZG board:
9
10- STM32 microcontroller in LQFP144 package
11- Two types of extension resources:
12
13  - ST Zio connector including: support for Arduino* Uno V3 connectivity
14    (A0 to A5, D0 to D15) and additional signals exposing a wide range of
15    peripherals
16  - ST morpho extension pin headers for full access to all STM32 I/Os
17
18- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
19- Flexible board power supply:
20
21  - 5 V from ST-LINK/V2-1 USB VBUS
22  - External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
23    connectors, 5 V on ST morpho connector
24
25- Three user LEDs
26- Two push-buttons: USER and RESET
27
28More information about the board can be found at the `Nucleo F412ZG website`_.
29
30Hardware
31********
32
33Nucleo F412ZG provides the following hardware components:
34
35- STM32F412ZGT6 in LQFP144 package
36- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
37- 100 MHz max CPU frequency
38- VDD from 1.7 V to 3.6 V
39- 1 MB Flash
40- 256 KB SRAM
41- GPIO with external interrupt capability
42- 12-bit ADC with 16 channels, with FIFO and burst support
43- RTC
44- 14 General purpose timers
45- 2 watchdog timers (independent and window)
46- SysTick timer
47- USART/UART (4)
48- I2C (4)
49- SPI (5)
50- SDIO
51- USB 2.0 OTG FS
52- DMA Controller
53- CRC calculation unit
54
55More information about STM32F412ZG can be found here:
56
57- `STM32F412ZG on www.st.com`_
58- `STM32F412 reference manual`_
59
60Supported Features
61==================
62
63The Zephyr nucleo_412zg board configuration supports the following hardware features:
64
65+-----------+------------+-------------------------------------+
66| Interface | Controller | Driver/Component                    |
67+===========+============+=====================================+
68| NVIC      | on-chip    | nested vector interrupt controller  |
69+-----------+------------+-------------------------------------+
70| UART      | on-chip    | serial port-polling;                |
71|           |            | serial port-interrupt               |
72+-----------+------------+-------------------------------------+
73| PINMUX    | on-chip    | pinmux                              |
74+-----------+------------+-------------------------------------+
75| GPIO      | on-chip    | gpio                                |
76+-----------+------------+-------------------------------------+
77| I2C       | on-chip    | i2c                                 |
78+-----------+------------+-------------------------------------+
79| SPI       | on-chip    | spi                                 |
80+-----------+------------+-------------------------------------+
81| USB       | on-chip    | usb                                 |
82+-----------+------------+-------------------------------------+
83| PWM       | on-chip    | pwm                                 |
84+-----------+------------+-------------------------------------+
85
86Other hardware features are not yet supported on this Zephyr port.
87
88The default configuration can be found in
89:zephyr_file:`boards/st/nucleo_f412zg/nucleo_f412zg_defconfig`
90
91
92Connections and IOs
93===================
94
95Nucleo F412ZG Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
96input/output, pull-up, etc.
97
98Available pins:
99---------------
100.. image:: img/nucleo_f412zg_zio_left.jpg
101   :align: center
102   :alt: Nucleo F412ZG ZIO connectors (left)
103.. image:: img/nucleo_f412zg_zio_right.jpg
104   :align: center
105   :alt: Nucleo F412ZG ZIO connectors (right)
106.. image:: img/nucleo_f412zg_morpho_left.jpg
107   :align: center
108   :alt: Nucleo F412ZG Morpho connectors (left)
109.. image:: img/nucleo_f412zg_morpho_right.jpg
110   :align: center
111   :alt: Nucleo F412ZG Morpho connectors (right)
112
113For more details please refer to `STM32 Nucleo-144 board User Manual`_.
114
115Default Zephyr Peripheral Mapping:
116----------------------------------
117
118- UART_3 TX/RX : PD8/PD9 (ST-Link Virtual Port Com)
119- UART_6 TX/RX : PG14/PG9 (Arduino Serial)
120- I2C1 SCL/SDA : PB8/PB9 (Arduino I2C)
121- SPI1 NSS/SCK/MISO/MOSI : PD14/PA5/PA6/PA7 (Arduino SPI)
122- PWM_2_CH1 : PA0
123- USER_PB : PC13
124- LD1 : PB0
125- LD2 : PB7
126- LD3 : PB14
127- USB DM : PA11
128- USB DP : PA12
129
130System Clock
131------------
132
133Nucleo F412ZG System Clock could be driven by internal or external oscillator,
134as well as main PLL clock. By default System clock is driven by PLL clock at 96MHz,
135driven by 8MHz high speed external clock.
136
137Serial Port
138-----------
139
140Nucleo F412ZG board has 4 UARTs. The Zephyr console output is assigned to UART3.
141Default settings are 115200 8N1.
142
143Network interface
144-----------------
145
146Ethernet over USB is configured as the default network interface
147
148Programming and Debugging
149*************************
150
151Nucleo F412ZG board includes an ST-LINK/V2-1 embedded debug tool interface.
152
153Flashing
154========
155
156The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
157so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
158
159Alternatively, OpenOCD or JLink can also be used to flash the board using
160the ``--runner`` (or ``-r``) option:
161
162.. code-block:: console
163
164   $ west flash --runner openocd
165   $ west flash --runner jlink
166
167
168.. _Nucleo F412ZG website:
169   https://www.st.com/en/evaluation-tools/nucleo-f412zg.html
170
171.. _STM32 Nucleo-144 board User Manual:
172   https://www.st.com/resource/en/user_manual/dm00244518.pdf
173
174.. _STM32F412ZG on www.st.com:
175   https://www.st.com/en/microcontrollers/stm32f412zg.html
176
177.. _STM32F412 reference manual:
178   https://www.st.com/resource/en/reference_manual/dm00180369.pdf
179
180.. _STM32CubeProgrammer:
181   https://www.st.com/en/development-tools/stm32cubeprog.html
182