Searched refs:core (Results 701 – 725 of 877) sorted by relevance
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| /Zephyr-latest/boards/renesas/ek_ra8d1/doc/ |
| D | index.rst | 7 graphics-enabled MCUs based on the Arm Cortex-M85 (CM85) core, delivering breakthrough performance
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| /Zephyr-latest/subsys/net/l2/ethernet/ |
| D | Kconfig | 113 module-help = Enables core ARP code to output debug messages.
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| /Zephyr-latest/boards/st/stm32f4_disco/doc/ |
| D | index.rst | 44 - 192+4 KB SRAM including 64-Kbyte of core coupled memory
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| /Zephyr-latest/boards/st/stm32u5a9j_dk/doc/ |
| D | index.rst | 8 core with Arm® TrustZone®.
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| /Zephyr-latest/boards/others/black_f407ve/doc/ |
| D | index.rst | 49 - 192+4 KB SRAM including 64-Kbyte of core coupled memory
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| /Zephyr-latest/boards/xen/xenvm/doc/ |
| D | index.rst | 67 Default core in this configuration is Cortex A72. Depending on yours actual
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| /Zephyr-latest/boards/nxp/ucans32k1sic/doc/ |
| D | index.rst | 122 The Arm Cortex-M4F core is configured to run at 80 MHz (RUN mode).
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| /Zephyr-latest/boards/lilygo/ttgo_t7v1_5/doc/ |
| D | index.rst | 10 - ESP32 chip (240MHz dual core, 520KB SRAM, Wi-Fi, Bluetooth)
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| /Zephyr-latest/boards/st/nucleo_f429zi/doc/ |
| D | index.rst | 43 - 256+4 KB SRAM including 64-Kbyte of core coupled memory
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| /Zephyr-latest/samples/boards/nxp/adsp/number_crunching/ |
| D | README.rst | 55 To build the sample with ``west`` for the ``imx8mp_evk/mimx8ml8/adsp``, which is the HiFi4 DSP core
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| /Zephyr-latest/subsys/net/ip/ |
| D | Kconfig.ipv6 | 324 module-str = Log level for core IPv6
325 module-help = Enables core IPv6 code to output debug messages.
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| /Zephyr-latest/boards/nxp/mimxrt1064_evk/doc/ |
| D | index.rst | 12 Arm® Cortex-M7® core up to 600 MHz.
459 …tions-processors/i.mx-rt-series/i.mx-rt1064-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1064
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| /Zephyr-latest/doc/develop/west/ |
| D | build-flash-debug.rst | 697 ``ZephyrBinaryRunner`` is available in the ``runners.core`` module; individual
791 Support for custom out-of-tree runners makes the ``runners.core`` module part of
798 This section documents the ``runners.core`` module used by the
799 flash and debug commands. This is the core abstraction used to implement
816 .. automodule:: runners.core
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| /Zephyr-latest/dts/xtensa/intel/ |
| D | intel_adsp_cavs25_tgph.dtsi | 160 compatible = "cdns,xtensa-core-intc";
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| /Zephyr-latest/boards/infineon/cyw920829m2evk_02/doc/ |
| D | index.rst | 118 …nd, you may now set breakpoints and perform other standard GDB debugging on the CYW20829 CM33 core.
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| /Zephyr-latest/arch/posix/ |
| D | CMakeLists.txt | 199 add_subdirectory(core)
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| /Zephyr-latest/boards/nxp/usb_kw24d512/doc/ |
| D | index.rst | 221 …kinetis-kw2xd-2.4-ghz-802.15.4-wireless-radio-microcontroller-mcu-based-on-arm-cortex-m4-core:KW2xD
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| /Zephyr-latest/boards/st/stm32f429i_disc1/doc/ |
| D | index.rst | 43 - 256+4 KB SRAM including 64-Kbyte of core coupled memory
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| /Zephyr-latest/boards/nxp/mimxrt1062_fmurt6/ |
| D | mimxrt1062_fmurt6.dts | 442 * timer will be used instead of systick, as allows the core clock to
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| /Zephyr-latest/boards/lilygo/ttgo_t8c3/doc/ |
| D | index.rst | 11 - ESP32-C3 chip (160MHz single core, 400KB SRAM, Wi-Fi)
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| /Zephyr-latest/boards/lilygo/ttgo_t8s3/doc/ |
| D | index.rst | 11 - ESP32-S3 chip (240MHz dual core, Bluetooth LE, Wi-Fi)
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| /Zephyr-latest/boards/espressif/esp32s2_devkitc/doc/ |
| D | index.rst | 14 ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be s…
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| /Zephyr-latest/boards/espressif/esp32s2_saola/doc/ |
| D | index.rst | 14 ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be s…
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| /Zephyr-latest/lib/os/ |
| D | Kconfig.cbprintf | 21 If selected a completely different implementation of the core
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| /Zephyr-latest/samples/boards/nxp/mimxrt595_evk/system_off/ |
| D | README.rst | 41 MIMXRT595-EVK core output
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