1.. zephyr:board:: ucans32k1sic
2
3Overview
4********
5
6`NXP UCANS32K1SIC`_ is a CAN signal improvement capability (SIC) evaluation
7board designed for both automotive and industrial applications. The UCANS32K1SIC
8provides two CAN SIC interfaces and is based on the 32-bit Arm Cortex-M4F
9`NXP S32K146`_ microcontroller.
10
11Hardware
12********
13
14- NXP S32K146
15    - Arm Cortex-M4F @ up to 112 Mhz
16    - 1 MB Flash
17    - 128 KB SRAM
18    - up to 127 I/Os
19    - 3x FlexCAN with 2x FD
20    - eDMA, 12-bit ADC, MPU, ECC and more.
21
22- Interfaces:
23    - DCD-LZ debug interface with SWD + Console / UART
24    - Dual CAN FD PHYs with dual connectors for daisy chain operation
25    - JST-GH DroneCode compliant standard connectors and I/O headers
26    - user RGB LED and button.
27
28More information about the hardware and design resources can be found at
29`NXP UCANS32K1SIC`_ website.
30
31Supported Features
32==================
33
34The ``ucans32k1sic`` board configuration supports the following hardware features:
35
36============  ==========  ================================
37Interface     Controller  Driver/Component
38============  ==========  ================================
39SYSMPU        on-chip     mpu
40PORT          on-chip     pinctrl
41GPIO          on-chip     gpio
42LPUART        on-chip     serial
43LPI2C         on-chip     i2c
44LPSPI         on-chip     spi
45FTM           on-chip     pwm
46FlexCAN       on-chip     can
47Watchdog      on-chip     watchdog
48RTC           on-chip     counter
49ADC           on-chip     adc
50============  ==========  ================================
51
52The default configuration can be found in the Kconfig file
53:zephyr_file:`boards/nxp/ucans32k1sic/ucans32k1sic_defconfig`.
54
55Connections and IOs
56===================
57
58This board has 5 GPIO ports named from ``gpioa`` to ``gpioe``.
59
60Pin control can be further configured from your application overlay by adding
61children nodes with the desired pinmux configuration to the singleton node
62``pinctrl``. Supported properties are described in
63:zephyr_file:`dts/bindings/pinctrl/nxp,port-pinctrl.yaml`.
64
65LEDs
66----
67
68The UCANS32K1SIC board has one user RGB LED that can be used either as a GPIO
69LED or as a PWM LED.
70
71.. table:: RGB LED as GPIO LED
72   :widths: auto
73
74   ===============  ================  ===============  =====
75   Devicetree node  Devicetree alias  Label            Pin
76   ===============  ================  ===============  =====
77   led1_red         led0              LED1_RGB_RED     PTD15
78   led1_green       led1              LED1_RGB_GREEN   PTD16
79   led1_blue        led2              LED1_RGB_BLUE    PTD0
80   ===============  ================  ===============  =====
81
82.. table:: RGB LED as PWM LED
83   :widths: auto
84
85   ===============  ========================  ==================  ================
86   Devicetree node  Devicetree alias          Label               Pin
87   ===============  ========================  ==================  ================
88   led1_red_pwm     pwm-led0 / red-pwm-led    LED1_RGB_RED_PWM    PTD15 / FTM0_CH0
89   led1_green_pwm   pwm-led1 / green-pwm-led  LED1_RGB_GREEN_PWM  PTD16 / FTM0_CH1
90   led1_blue_pwm    pwm-led2 / blue-pwm-led   LED1_RGB_BLUE_PWM   PTD0 / FTM0_CH2
91   ===============  ========================  ==================  ================
92
93The user can control the LEDs in any way. An output of ``0`` illuminates the LED.
94
95Buttons
96-------
97
98The UCANS32K1SIC board has one user button:
99
100=======================  ==============  =====
101Devicetree node          Label           Pin
102=======================  ==============  =====
103sw0 / button_3           SW3             PTD15
104=======================  ==============  =====
105
106Serial Console
107==============
108
109The serial console is provided via ``lpuart1`` on the 7-pin DCD-LZ debug
110connector ``P6``.
111
112=========  =====  ============
113Connector  Pin    Pin Function
114=========  =====  ============
115P6.2       PTC7   LPUART1_TX
116P6.3       PTC6   LPUART1_RX
117=========  =====  ============
118
119System Clock
120============
121
122The Arm Cortex-M4F core is configured to run at 80 MHz (RUN mode).
123
124Programming and Debugging
125*************************
126
127Applications for the ``ucans32k1sic`` board can be built in the usual way as
128documented in :ref:`build_an_application`.
129
130This board configuration supports `Lauterbach TRACE32`_ and `SEGGER J-Link`_
131West runners for flashing and debugging applications. Follow the steps described
132in :ref:`lauterbach-trace32-debug-host-tools` and :ref:`jlink-debug-host-tools`,
133to setup the flash and debug host tools for these runners, respectively. The
134default runner is J-Link.
135
136Flashing
137========
138
139Run the ``west flash`` command to flash the application using SEGGER J-Link.
140Alternatively, run ``west flash -r trace32`` to use Lauterbach TRACE32.
141
142The Lauterbach TRACE32 runner supports additional options that can be passed
143through command line:
144
145.. code-block:: console
146
147   west flash -r trace32 --startup-args elfFile=<elf_path> loadTo=<flash/sram>
148      eraseFlash=<yes/no> verifyFlash=<yes/no>
149
150Where:
151
152- ``<elf_path>`` is the path to the Zephyr application ELF in the output
153  directory
154- ``loadTo=flash`` loads the application to the SoC internal program flash
155  (:kconfig:option:`CONFIG_XIP` must be set), and ``loadTo=sram`` load the
156  application to SRAM. The default is ``flash``.
157- ``eraseFlash=yes`` erases the whole content of SoC internal flash before the
158  application is downloaded to either Flash or SRAM. This routine takes time to
159  execute. The default is ``no``.
160- ``verifyFlash=yes`` verify the SoC internal flash content after programming
161  (use together with ``loadTo=flash``). The default is ``no``.
162
163For example, to erase and verify flash content:
164
165.. code-block:: console
166
167   west flash -r trace32 --startup-args elfFile=build/zephyr/zephyr.elf loadTo=flash eraseFlash=yes verifyFlash=yes
168
169Debugging
170=========
171
172Run the ``west debug`` command to start a GDB session using SEGGER J-Link.
173Alternatively, run ``west debug -r trace32`` to launch the Lauterbach TRACE32
174software debugging interface.
175
176References
177**********
178
179.. target-notes::
180
181.. _NXP UCANS32K1SIC:
182   https://www.nxp.com/design/development-boards/analog-toolbox/can-sic-evaluation-board:UCANS32K1SIC
183
184.. _NXP S32K146:
185   https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32k-auto-general-purpose-mcus/s32k1-microcontrollers-for-automotive-general-purpose:S32K1
186
187.. _Lauterbach TRACE32:
188   https://www.lauterbach.com
189
190.. _SEGGER J-Link:
191   https://wiki.segger.com/S32Kxxx
192