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/Zephyr-latest/tests/drivers/adc/adc_api/boards/
Dolimex_stm32_h103.overlay9 /* adjust channel number according to pinmux in board.dts */
18 channel@0 {
Dronoth_lodev.overlay9 /* adjust channel number according to pinmux in board.dts */
18 channel@0 {
Dnucleo_f722ze.overlay17 channel@3 {
25 channel@a {
Drpi_pico_rp2040_w.overlay17 channel@0 {
25 channel@1 {
Dapollo3_evb.overlay17 channel@4 {
25 channel@7 {
Dapollo4p_evb.overlay17 channel@4 {
25 channel@7 {
Dapollo3p_evb.overlay17 channel@4 {
25 channel@7 {
Dfrdm_mcxc242.overlay17 channel@0 {
26 channel@1 {
Dnucleo_u575zi_q.overlay9 /* adjust channel number according to pinmux in board.dts */
21 channel@1 {
Dmimxrt1062_fmurt6.overlay19 channel@0 {
27 channel@1 {
/Zephyr-latest/samples/drivers/adc/adc_dt/boards/
Dmimxrt685_evk_mimxrt685s_cm33.overlay12 /* adjust channel number according to pinmux in board.dts */
28 channel@0 {
38 channel@1 {
Dtlsr9518adk80d.overlay9 /* adjust channel number according to pinmux in board.dts */
18 channel@0 {
Dapollo3_evb.overlay17 channel@4 {
25 channel@7 {
Dapollo3p_evb.overlay17 channel@4 {
25 channel@7 {
/Zephyr-latest/drivers/mbox/
Dmbox_esp32.c96 static int esp32_mbox_send(const struct device *dev, mbox_channel_id_t channel, in esp32_mbox_send() argument
103 if (channel > 0xFFFF) { in esp32_mbox_send()
117 dev_data->control->dest_cpu_msg_id[dev_data->other_core_id] = (uint16_t)(channel & 0xFFFF); in esp32_mbox_send()
144 static int esp32_mbox_register_callback(const struct device *dev, mbox_channel_id_t channel, in esp32_mbox_register_callback() argument
147 ARG_UNUSED(channel); in esp32_mbox_register_callback()
179 static int esp32_mbox_set_enabled(const struct device *dev, mbox_channel_id_t channel, bool enable) in esp32_mbox_set_enabled() argument
188 ARG_UNUSED(channel); in esp32_mbox_set_enabled()
/Zephyr-latest/drivers/ptp_clock/
Dptp_clock_nxp_enet.c173 ptp_config.channel = kENET_PtpTimerChannel3; in nxp_enet_ptp_clock_callback()
212 enet_ptp_timer_channel_t channel; in ptp_clock_nxp_enet_isr() local
217 for (channel = kENET_PtpTimerChannel1; channel <= kENET_PtpTimerChannel4; channel++) { in ptp_clock_nxp_enet_isr()
218 if (ENET_Ptp1588GetChannelStatus(data->base, channel)) { in ptp_clock_nxp_enet_isr()
219 ENET_Ptp1588ClearChannelStatus(data->base, channel); in ptp_clock_nxp_enet_isr()
/Zephyr-latest/dts/arm/renesas/ra/ra6/
Dr7fa6m5xh.dtsi87 channel = <1>;
101 channel = <2>;
115 channel = <3>;
129 channel = <4>;
143 channel = <5>;
157 channel = <6>;
171 channel = <7>;
185 channel = <8>;
192 channel = <2>;
212 channel-count = <13>;
[all …]
/Zephyr-latest/drivers/ieee802154/
Dieee802154_cc13xx_cc26xx.c157 uint16_t channel, uint16_t *frequency, uint16_t *fractFreq) in ieee802154_cc13xx_cc26xx_channel_to_frequency() argument
163 if (channel >= 11 && channel <= 26) { in ieee802154_cc13xx_cc26xx_channel_to_frequency()
164 *frequency = 2405 + 5 * (channel - 11); in ieee802154_cc13xx_cc26xx_channel_to_frequency()
171 return channel < 11 ? -ENOTSUP : -EINVAL; in ieee802154_cc13xx_cc26xx_channel_to_frequency()
176 uint16_t channel) in ieee802154_cc13xx_cc26xx_set_channel() argument
184 ret = ieee802154_cc13xx_cc26xx_channel_to_frequency(channel, &freq, &fract); in ieee802154_cc13xx_cc26xx_set_channel()
212 drv_data->cmd_ieee_rx.channel = channel; in ieee802154_cc13xx_cc26xx_set_channel()
233 uint8_t channel; in ieee802154_cc13xx_cc26xx_reset_channel() local
237 channel = drv_data->cmd_ieee_rx.channel; in ieee802154_cc13xx_cc26xx_reset_channel()
239 __ASSERT_NO_MSG(11 <= channel && channel <= 26); in ieee802154_cc13xx_cc26xx_reset_channel()
[all …]
/Zephyr-latest/drivers/sensor/ite/ite_tach_it8xxx2/
Dtach_ite_it8xxx2.c75 int channel; member
120 int tach_ch = config->channel; in tach_it8xxx2_sample_fetch()
185 int tach_ch = config->channel; in tach_it8xxx2_init()
231 .channel = DT_INST_PROP(inst, channel), \
/Zephyr-latest/include/zephyr/devicetree/
Dpwms.h208 DT_PWMS_CELL_BY_IDX(node_id, idx, channel)
225 DT_PWMS_CELL_BY_NAME(node_id, name, channel)
395 DT_INST_PWMS_CELL_BY_IDX(inst, idx, channel)
406 DT_INST_PWMS_CELL_BY_NAME(inst, name, channel)
/Zephyr-latest/dts/arm/renesas/ra/ra4/
Dr7fa4m3ax.dtsi59 channel = <1>;
73 channel = <2>;
87 channel = <3>;
101 channel = <4>;
107 channel-count = <12>;
108 channel-available-mask = <0x33ff>;
112 channel-count = <10>;
113 channel-available-mask = <0x7f0007>;
119 channel = <RA_PWM_CHANNEL_2>;
129 channel = <RA_PWM_CHANNEL_3>;
[all …]
/Zephyr-latest/drivers/dac/
Ddac_test.c20 int vnd_dac_write_value(const struct device *dev, uint8_t channel, uint32_t value) in vnd_dac_write_value() argument
23 ARG_UNUSED(channel); in vnd_dac_write_value()
/Zephyr-latest/include/zephyr/net/
Dwifi_credentials.h58 uint8_t channel; /**< Channel on which the network operates */ member
114 uint32_t *flags, uint8_t *channel, uint32_t *timeout);
137 size_t password_len, uint32_t flags, uint8_t channel,
/Zephyr-latest/tests/drivers/regulator/voltage/boards/
Dfrdm_mcxw71.overlay10 /* To do this test, connect LPADC0 channel 6A(J4 pin 5) to VREF_OUT (J2 pin 3) */
38 channel@0 {
45 /* the signal name is ADC0_A6 but it is still channel 2 */
/Zephyr-latest/samples/drivers/adc/adc_sequence/boards/
Dnrf52840dk_nrf52840.overlay17 channel@0 {
25 channel@1 {

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