Searched +full:xtensa +full:- +full:build +full:- +full:all (Results 1 – 25 of 76) sorted by relevance
1234
| /sof-2.7.6/.github/workflows/ |
| D | pull-request.yml | 1 ---
2 # Tools that can save round-trips to github and a lot of time:
4 # yamllint -f parsable pull_request.yml
6 # yaml merge-expand pull_request.yml exp.yml &&
7 # diff -w -u pull_request.yml exp.yml
14 # this name is the Checks window next to other, non-github checks.
17 # yamllint disable-line rule:truthy
21 - 'main'
22 - 'stable-**'
23 - '**-stable'
[all …]
|
| /sof-2.7.6/scripts/ |
| D | README.docker | 1 The docker container provided in docker_build sets up a build environment for
3 the docker build container.
7 sudo usermod -aG docker your-user-name
13 First, build the docker container. This step needs to be done initially and
18 ./docker-build.sh
22 To build for baytrail:
23 ./scripts/docker-run.sh ./scripts/xtensa-build-all.sh -l byt
25 ./scripts/docker-run.sh ./scripts/xtensa-build-all.sh byt
28 ./scripts/docker-run.sh ./scripts/build-tools.sh
30 An incremental sof.git build:
[all …]
|
| D | xtensa-build-all.sh | 2 # SPDX-License-Identifier: BSD-3-Clause
3 # Copyright(c) 2018 Intel Corporation. All rights reserved.
6 set -e
9 imx8 imx8x imx8m imx8ulp tgl tgl-h rn)
13 BUILD_JOBS=$(nproc --all)
19 # As CMake forks one compiler process for each source file, the XTensa
25 # The entire, purely local gcc build is so fast (~ 1s) that observing
26 # any difference between -j nproc and -j nproc*N is practically
29 if [ -n "$XTENSA_TOOLS_ROOT" ]; then
46 Re-configures and re-builds SOF using the corresponding compiler and the
[all …]
|
| D | docker-run.sh | 2 # SPDX-License-Identifier: BSD-3-Clause
3 # Copyright(c) 2018 Intel Corporation. All rights reserved.
8 # To build sof for baytrail:
9 # ./scripts/docker-run.sh ./scripts/xtensa-build-all.sh byt
10 # To build topology:
11 # ./scripts/docker-run.sh ./scripts/build-tools.sh
13 # set -x
15 if tty --quiet; then
16 SOF_DOCKER_RUN="$SOF_DOCKER_RUN --tty"
19 docker run -i -v "$(pwd)":/home/sof/work/sof.git \
[all …]
|
| /sof-2.7.6/zephyr/ |
| D | docker-build.sh | 2 # SPDX-License-Identifier: BSD-3-Clause
3 # Copyright(c) 2021 Intel Corporation. All rights reserved.
5 # "All problems can be solved by another level of indirection"
10 set -e
11 set -x
15 # Make sure we're in the right place; chgrp -R below.
16 test -e ./scripts/xtensa-build-zephyr.sh
18 sudo apt-get update
19 sudo apt-get -y install tree
21 if test -e zephyrproject; then
[all …]
|
| D | README | 20 ---
24 branch: lrg/topic/zephyr-app on the SOF repo
28 ------
48 % west build -p always -b up_squared_adsp samples/basic/minimal
49 % west sign -t rimage -- -k ../../sof/sof/rimage/keys/otc_private_key.pem
55 Get the SOF qemu sof-v4.2 branch here.
61 ./configure' '--prefix=.' '--target-list=xtensa-softmmu,x86_64-softmmu' \
62 '--enable-gtk' '--enable-sdl' '--enable-spice' \
63 '--audio-drv-list=alsa' '--enable-libusb' \
64 '--enable-usb-redir' '--enable-coroutine-pool' \
[all …]
|
| /sof-2.7.6/scripts/docker_build/sof_builder/ |
| D | Dockerfile | 1 # Copyright 2018 The Chromium Authors. All rights reserved.
2 # Use of this source code is governed by a BSD-style license that can be
5 # Defines a docker image that can build sound open firmware
9 # build docker image:
10 # docker build --build-arg UID=$(id -u) -t sof .
11 # docker run -it -v <insert sof dir here>:/home/sof/workdir --user `id -u` sof
14 # docker run -it -v <insert sof dir here>:/home/sof/work/sof.git --user `id -u` sof ./incremental.…
25 # for non-interactive package install
28 RUN apt-get -y update && \
29 apt-get install -y \
[all …]
|
| /sof-2.7.6/scripts/scan/ |
| D | clang-scan-build-xtensa.sh | 2 # SPDX-License-Identifier: BSD-3-Clause
3 # Copyright(c) 2020 Intel Corporation. All rights reserved.
6 # This script configures & performs build for clang's static analyzer.
8 set -eu
11 echo "Usage: $0 -t <toolchain> -c <config> -r <root_dir> [options]"
12 echo " -t Toolchain's name."
13 echo " -c Name of defconfig."
14 echo " -r Xtensa root dir."
15 echo " [-j n] Set number of make build jobs."
16 echo " [-v] Verbose output."
[all …]
|
| /sof-2.7.6/ |
| D | .travis.yml | 1 ---
2 # Suggested tools that can save round-trips to github and a lot of time:
6 # yaml merge-expand .travis.yml exp.yml && diff -b -u .travis.yml exp.yml
16 - docker
23 - buildonly
24 - tests
27 # 'name:'-less jobs appear with their env, e.g.: PLATFORM=tgl
33 - &build-platform
36 &docker-pull-sof
39 ./scripts/docker-run.sh ./scripts/xtensa-build-all.sh -r $PLATFORM
[all …]
|
| /sof-2.7.6/test/ |
| D | test-all-defconfigs.sh | 3 set -e
12 mkdir -p "$BUILDTOP"
13 ( set -x
14 cmake -DINIT_CONFIG="$conf" -B "$BUILDTOP"/"$conf" -DBUILD_UNIT_TESTS=ON \
15 -DBUILD_UNIT_TESTS_HOST=ON
17 cmake --build "$BUILDTOP"/"$conf" -- -j"$(nproc)"
25 # First make sure all configurations build
26 for d in "$SOFTOP"/src/arch/xtensa/configs/*_defconfig; do
31 # Now run all the tests
33 ( set -x
[all …]
|
| /sof-2.7.6/src/arch/xtensa/xtos/ |
| D | _sharedvectors.S | 1 // _sharedvectors.S -- Reference symbols to pull in any shared vectors
3 // $Id: //depot/rel/Foxhill/dot.8/Xtensa/OS/xtos/_sharedvectors.S#1 $
16 // in all copies or substantial portions of the Software.
26 #include <xtensa/coreasm.h>
28 /* Not present by default. Multicore build flows build/use a custom
|
| D | _sharedvectors-for-reset.S | 1 // _sharedvectors-for-reset.S -- Reference to pull in a shared reset vector
2 // $Id: //depot/rel/Foxhill/dot.8/Xtensa/OS/xtos/_sharedvectors-for-reset.S#1 $
15 // in all copies or substantial portions of the Software.
25 #include <xtensa/coreasm.h>
27 /* Multicore build flows can use this file (_sharedvectors-for-reset.o)
32 shared-reset-vector.S, which requires the PRID option). */
|
| /sof-2.7.6/src/platform/haswell/include/arch/xtensa/config/ |
| D | defs.h | 1 /* Definitions for Xtensa instructions, types, and protos. */
3 /* Customer ID=4313; Build=0x5483b; Copyright (c) 2003-2004 Tensilica Inc.
14 in all copies or substantial portions of the Software.
25 and earlier Xtensa releases. It includes only a subset of the
33 #include <xtensa/tie/xt_core.h>
34 #include <xtensa/tie/xt_misc.h>
35 #include <xtensa/tie/xt_booleans.h>
|
| D | specreg.h | 2 * Xtensa Special Register symbolic names
5 /* $Id: //depot/rel/Eaglenest/Xtensa/SWConfig/hal/specreg.h.tpp#1 $ */
7 /* Customer ID=4313; Build=0x5483b; Copyright (c) 1998-2002 Tensilica Inc.
18 in all copies or substantial portions of the Software.
32 #include <xtensa/corebits.h>
101 /* Special names for read-only and write-only interrupt registers: */
|
| /sof-2.7.6/src/platform/imx8m/include/arch/xtensa/config/ |
| D | defs.h | 1 /* Definitions for Xtensa instructions, types, and protos. */
3 /* Customer ID=14556; Build=0x7ef28; Copyright (c) 2003-2004 Tensilica Inc.
14 in all copies or substantial portions of the Software.
25 and earlier Xtensa releases. It includes only a subset of the
33 #include <xtensa/tie/xt_core.h>
34 #include <xtensa/tie/xt_misc.h>
35 #include <xtensa/tie/xt_booleans.h>
|
| D | specreg.h | 2 * Xtensa Special Register symbolic names
5 /* $Id: //depot/rel/Eaglenest/Xtensa/SWConfig/hal/specreg.h.tpp#1 $ */
7 /* Customer ID=14556; Build=0x7ef28; Copyright (c) 1998-2002 Tensilica Inc.
18 in all copies or substantial portions of the Software.
32 #include <xtensa/corebits.h>
95 /* Special names for read-only and write-only interrupt registers: */
|
| /sof-2.7.6/src/platform/imx8/include/arch/xtensa/config/ |
| D | defs.h | 1 /* Definitions for Xtensa instructions, types, and protos. */
3 /* Customer ID=12445; Build=0x700c0; Copyright (c) 2003-2004 Tensilica Inc.
14 in all copies or substantial portions of the Software.
25 and earlier Xtensa releases. It includes only a subset of the
33 #include <xtensa/tie/xt_core.h>
34 #include <xtensa/tie/xt_misc.h>
35 #include <xtensa/tie/xt_booleans.h>
|
| D | specreg.h | 2 * Xtensa Special Register symbolic names
5 /* $Id: //depot/rel/Eaglenest/Xtensa/SWConfig/hal/specreg.h.tpp#1 $ */
7 /* Customer ID=12445; Build=0x700c0; Copyright (c) 1998-2002 Tensilica Inc.
18 in all copies or substantial portions of the Software.
32 #include <xtensa/corebits.h>
95 /* Special names for read-only and write-only interrupt registers: */
|
| /sof-2.7.6/src/platform/baytrail/include/arch/xtensa/config/ |
| D | defs.h | 1 /* Definitions for Xtensa instructions, types, and protos. */
3 /* Customer ID=11430; Build=0x668e9; Copyright (c) 2003-2004 Tensilica Inc.
14 in all copies or substantial portions of the Software.
25 and earlier Xtensa releases. It includes only a subset of the
33 #include <xtensa/tie/xt_core.h>
34 #include <xtensa/tie/xt_misc.h>
35 #include <xtensa/tie/xt_booleans.h>
|
| /sof-2.7.6/src/platform/amd/renoir/include/arch/xtensa/config/ |
| D | defs.h | 1 /* Definitions for Xtensa instructions, types, and protos. */
3 /* Customer ID=12153; Build=0x72343; Copyright (c) 2003-2004 Tensilica Inc.
14 in all copies or substantial portions of the Software.
25 and earlier Xtensa releases. It includes only a subset of the
33 #include <xtensa/tie/xt_core.h>
34 #include <xtensa/tie/xt_misc.h>
35 #include <xtensa/tie/xt_booleans.h>
|
| /sof-2.7.6/src/platform/imx8ulp/include/arch/xtensa/config/ |
| D | defs.h | 1 /* Definitions for Xtensa instructions, types, and protos. */
3 /* Customer ID=13270; Build=0x92cb6; Copyright (c) 2003-2004 Tensilica Inc.
14 in all copies or substantial portions of the Software.
25 and earlier Xtensa releases. It includes only a subset of the
33 #include <xtensa/tie/xt_core.h>
34 #include <xtensa/tie/xt_misc.h>
35 #include <xtensa/tie/xt_booleans.h>
|
| /sof-2.7.6/src/audio/ |
| D | Kconfig | 1 # SPDX-License-Identifier: BSD-3-Clause
39 with 8 - 192 kHz input and 8 - 48 kHz output. The coefficients
49 with 8 - 48 kHz input and output. The coefficients are 32 bits
58 with 8 - 48 kHz input and output. The coefficients are 16 bits
59 that restricts the possible stop-attenuation and could cause
94 are available in ISA and are used by the compiler. i.e. xt-xcc on
95 xtensa will generate MAC instructions but GCC on xtensa won't.
111 cos algorithm converges, when the angle is in the range [-pi/2, pi/2).
113 or subtracted from the angle until it is within the range [-pi/2,pi/2).
114 Start with the angle in the range [-2*pi, 2*pi) and output has range in
[all …]
|
| /sof-2.7.6/src/arch/xtensa/ |
| D | CMakeLists.txt | 1 # SPDX-License-Identifier: BSD-3-Clause
3 # platform-specific values
24 set(RIMAGE_MOD_OFFSET_FLAG -x 24)
58 ${PROJECT_SOURCE_DIR}/src/arch/xtensa/include
59 ${PROJECT_SOURCE_DIR}/src/arch/xtensa/xtos
75 set(stdlib_flag "-nostdlib")
81 # pretend to be xtensa compiler to go trough the same paths for AST
82 target_compile_definitions(sof_options INTERFACE -D__XTENSA__=1)
87 find_program(XCC_PATH NAMES "xt-xcc" PATHS ENV PATH NO_DEFAULT_PATH)
89 target_include_directories(sof_options INTERFACE ${XCC_DIR}/../xtensa-elf/include)
[all …]
|
| /sof-2.7.6/src/include/sof/math/ |
| D | fir_config.h | 1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright(c) 2017 Intel Corporation. All rights reserved.
13 /* Prevent xtensa gcc built firmware to be configured for longer
39 /* Select optimized code variant when xt-xcc compiler is used */
42 #include <xtensa/config/core-isa.h>
51 #error "No HIFIEP or HIFI3 found. Cannot build FIR module."
|
| /sof-2.7.6/installer/ |
| D | README.md | 2 ``/lib/firmware/intel/sof-tplg/`` directories.
5 ``./scripts/xtensa-build-all.sh`` and ``./scripts/build-tools.sh -T
6 -l``. It automatically runs these scripts when needed for the platforms
16 The default target (re-)generates the staging area:
18 make -C installer/
22 sudo make -C installer/ rsync
26 different directory, copy the ``sample-config.mk`` file to ``config.mk``
34 make -C installer/ stage rsync
41 You can use `make -jN stage` to build multiple platforms faster but do
42 *not* `make -jN stage rsync` as this will start deploying before the
[all …]
|
1234
