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Searched +full:sense +full:- +full:edge +full:- +full:mask (Results 1 – 11 of 11) sorted by relevance

/Zephyr-latest/dts/bindings/gpio/
Dnordic,nrf-gpio.yaml1 # Copyright (c) 2018, marc-cpdesign
2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "nordic,nrf-gpio"
8 include: [gpio-controller.yaml, base.yaml]
14 gpiote-instance:
19 "#gpio-cells":
22 sense-edge-mask:
25 Mask of pins that use the GPIO sense mechanism for edge detection.
26 Pins not included in the mask use GPIOTE channels in the event mode.
40 gpio-cells:
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/Zephyr-latest/tests/drivers/gpio/gpio_basic_api/boards/
Dnrf52840dk_nrf52840_sense_edge.overlay4 * SPDX-License-Identifier: Apache-2.0
8 sense-edge-mask = <0x6>;
Dnrf54h20dk_nrf54h20_common.dtsi1 /* SPDX-License-Identifier: Apache-2.0 */
5 compatible = "test-gpio-basic-api";
6 out-gpios = <&gpio0 6 0>;
7 in-gpios = <&gpio0 7 0>;
13 sense-edge-mask = <0x60>;
18 owned-channels = < 0 1 >;
/Zephyr-latest/drivers/interrupt_controller/
Dwuc_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/interrupt-controller/it8xxx2-wuc.h>
22 /* WUC wakeup edge mode register */
24 /* WUC wakeup edge sense register */
28 /* WUC wakeup both edge mode register */
32 void it8xxx2_wuc_enable(const struct device *dev, uint8_t mask) in it8xxx2_wuc_enable() argument
34 const struct it8xxx2_wuc_cfg *config = dev->config; in it8xxx2_wuc_enable()
35 volatile uint8_t *reg_wuenr = config->reg_wuenr; in it8xxx2_wuc_enable()
46 *reg_wuenr |= mask; in it8xxx2_wuc_enable()
49 void it8xxx2_wuc_disable(const struct device *dev, uint8_t mask) in it8xxx2_wuc_disable() argument
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/Zephyr-latest/boards/bbc/microbit/
Dbbc_microbit.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include "bbc_microbit-pinctrl.dtsi"
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
27 zephyr,shell-uart = &uart0;
28 zephyr,bt-mon-uart = &uart0;
29 zephyr,bt-c2h-uart = &uart0;
32 zephyr,code-partition = &slot0_partition;
37 compatible = "gpio-keys";
52 compatible = "nordic,nrf-led-matrix";
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/Zephyr-latest/drivers/gpio/
Dgpio_nrfx.c4 * SPDX-License-Identifier: Apache-2.0
12 #include <zephyr/dt-bindings/gpio/nordic-nrf-gpio.h>
41 return port->data; in get_port_data()
46 return port->config; in get_port_cfg()
51 return cfg->gpiote.p_reg != NULL; in has_gpiote()
65 static int gpio_nrfx_gpd_retain_set(const struct device *port, uint32_t mask, gpio_flags_t flags) in gpio_nrfx_gpd_retain_set() argument
70 if (cfg->pad_pd == NRF_GPD_FAST_ACTIVE1) { in gpio_nrfx_gpd_retain_set()
74 nrf_gpio_port_retain_enable(cfg->port, mask); in gpio_nrfx_gpd_retain_set()
84 ARG_UNUSED(mask); in gpio_nrfx_gpd_retain_set()
91 static int gpio_nrfx_gpd_retain_clear(const struct device *port, uint32_t mask) in gpio_nrfx_gpd_retain_clear() argument
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Dgpio_intel.c2 * Copyright (c) 2018-2019 Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
17 * Due to GPIO callback only allowing 32 pins (as a 32-bit mask) at once,
18 * each set is further sub-divided into multiple devices, so
30 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
92 ((const struct gpio_intel_config *)(_dev)->config)
93 #define DEV_DATA(_dev) ((struct gpio_intel_data *)(_dev)->data)
130 #define REG_GPI_INT_STS_BASE_GET(data) (data)->intr_stat_reg
132 #define REG_GPI_INT_EN_BASE_GET(data) (data)->intr_stat_reg + 0x20
136 #define GPIO_PAD_OWNERSHIP_GET(data, pin, offset) (data)->pad_owner_reg + (((pin) / 8) * 0x4)
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Dgpio_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
12 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
57 ((struct gpio_ite_data *)(dev)->data)
60 ((const struct gpio_ite_cfg *)(dev)->config)
63 * Convert wake-up controller (WUC) group to the corresponding wake-up edge
64 * sense register (WUESR). Return pointer to the register.
73 * From WUESR1-WUESR4, the address increases by ones. From WUESR5 on in wuesr()
77 (volatile uint8_t *)(IT8XXX2_WUC_WUESR1 + grp-1) : in wuesr()
78 (volatile uint8_t *)(IT8XXX2_WUC_WUESR5 + 4*(grp-5)); in wuesr()
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/Zephyr-latest/include/zephyr/xen/public/
Dxen.h1 /* SPDX-License-Identifier: MIT */
33 #include "arch-arm.h"
178 * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
182 * aren't adjusted on the I/O-mapping code path).
183 * This only makes sense as HYPERVISOR_mmu_update()'s and
193 * This only makes sense as
194 * - HYPERVISOR_mmu_update()'s, HYPERVISOR_mmuext_op()'s, or
196 * - with XENMAPSPACE_gmfn_foreign,
212 /* Mask for valid domain id values */
221 * Event channel endpoints per domain (when using the 2-level ABI):
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/Zephyr-latest/drivers/ieee802154/
Dieee802154_dw1000_regs.h4 * SPDX-License-Identifier: Apache-2.0
7 * https://github.com/Decawave/mynewt-dw1000-core.git
14 * Copyright (C) 2017-2018, Decawave Limited, All Rights Reserved
24 * http://www.apache.org/licenses/LICENSE-2.0
69 /* Access mask to SYS_CFG_ID */
75 /* Frame Filtering Behave as a Co-ordinator */
93 /* SPI data launch edge */
117 * Receiver Auto-Re-enable.
118 * This bit is used to cause the receiver to re-enable automatically
126 /* System Time Counter (40-bit) */
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/Zephyr-latest/scripts/
Dcheckpatch.pl2 # SPDX-License-Identifier: GPL-2.0
7 # (c) 2008-2010 Andy Whitcroft <apw@canonical.com>
8 # (c) 2010-2018 Joe Perches <joe@perches.com>
67 my $git_command ='export LANGUAGE=en_US.UTF-8; git';
78 -q, --quiet quiet
79 --no-tree run without a kernel tree
80 --no-signoff do not check for 'Signed-off-by' line
81 --patch treat FILE as patchfile (default)
82 --emacs emacs compile window format
83 --terse one line per report
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