4  * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
12 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
57 	((struct gpio_ite_data *)(dev)->data)
60 	((const struct gpio_ite_cfg *)(dev)->config)
63  * Convert wake-up controller (WUC) group to the corresponding wake-up edge
64  * sense register (WUESR). Return pointer to the register.
73 	 * From WUESR1-WUESR4, the address increases by ones. From WUESR5 on  in wuesr()
77 			(volatile uint8_t *)(IT8XXX2_WUC_WUESR1 + grp-1) :  in wuesr()
78 			(volatile uint8_t *)(IT8XXX2_WUC_WUESR5 + 4*(grp-5));  in wuesr()
82  * Convert wake-up controller (WUC) group to the corresponding wake-up edge
92 	 * From WUEMR1-WUEMR4, the address increases by ones. From WUEMR5 on  in wuemr()
96 			(volatile uint8_t *)(IT8XXX2_WUC_WUEMR1 + grp-1) :  in wuemr()
97 			(volatile uint8_t *)(IT8XXX2_WUC_WUEMR5 + 4*(grp-5));  in wuemr()
101  * Convert wake-up controller (WUC) group to the corresponding wake-up both edge
111 	 * From WUBEMR1-WUBEMR4, the address increases by ones. From WUBEMR5 on  in wubemr()
115 			(volatile uint8_t *)(IT8XXX2_WUC_WUBEMR1 + grp-1) :  in wubemr()
116 			(volatile uint8_t *)(IT8XXX2_WUC_WUBEMR5 + 4*(grp-5));  in wubemr()
120  * Array to store the corresponding GPIO WUC group and mask
239 		(uint8_t)(DT_REG_ADDR(DT_NODELABEL(label)) - \
361 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_configure()
362 	volatile uint8_t *reg_gpcr = (uint8_t *)(gpio_config->reg_gpcr + pin);  in gpio_ite_configure()
363 	volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr;  in gpio_ite_configure()
366 	uint8_t mask = BIT(pin);  in gpio_ite_configure()  local
368 	__ASSERT(gpio_config->index < GPIO_GROUP_COUNT,  in gpio_ite_configure()
374 		return -ENOTSUP;  in gpio_ite_configure()
380 		 * Since not all GPIOs can be to configured as tri-state,  in gpio_ite_configure()
386 			LOG_ERR("Cannot config GPIO-%c%d as tri-state",  in gpio_ite_configure()
387 				(gpio_config->index + 'A'), pin);  in gpio_ite_configure()
388 			return -ENOTSUP;  in gpio_ite_configure()
402 		*reg_gpotr |= mask;  in gpio_ite_configure()
404 		*reg_gpotr &= ~mask;  in gpio_ite_configure()
409 			gpio_1p8v[gpio_config->index][pin].offset);  in gpio_ite_configure()
410 	mask_1p8v = gpio_1p8v[gpio_config->index][pin].mask_1p8v;  in gpio_ite_configure()
422 			return -EINVAL;  in gpio_ite_configure()
429 			*reg_gpdr |= mask;  in gpio_ite_configure()
431 			*reg_gpdr &= ~mask;  in gpio_ite_configure()
467 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_get_config()
468 	volatile uint8_t *reg_gpcr = (uint8_t *)(gpio_config->reg_gpcr + pin);  in gpio_ite_get_config()
469 	volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr;  in gpio_ite_get_config()
472 	uint8_t mask = BIT(pin);  in gpio_ite_get_config()  local
475 	__ASSERT(gpio_config->index < GPIO_GROUP_COUNT,  in gpio_ite_get_config()
478 	/* push-pull or open-drain */  in gpio_ite_get_config()
479 	if (*reg_gpotr & mask) {  in gpio_ite_get_config()
485 			gpio_1p8v[gpio_config->index][pin].offset);  in gpio_ite_get_config()
491 		mask_1p8v = gpio_1p8v[gpio_config->index][pin].mask_1p8v;  in gpio_ite_get_config()
504 		if (*reg_gpdr & mask) {  in gpio_ite_get_config()
534 	volatile uint8_t *reg_gpdmr = (uint8_t *)gpio_config->reg_gpdmr;  in gpio_ite_port_get_raw()
543 					gpio_port_pins_t mask,  in gpio_ite_port_set_masked_raw()  argument
547 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_set_masked_raw()
550 	*reg_gpdr = ((out & ~mask) | (value & mask));  in gpio_ite_port_set_masked_raw()
559 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_set_bits_raw()
571 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_clear_bits_raw()
583 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_toggle_bits()
597 	return gpio_manage_callback(&data->callbacks, callback, set);  in gpio_ite_manage_callback()
610 		gpio_fire_callbacks(&data->callbacks, dev, gpio_mask);  in gpio_ite_isr()
620 	uint8_t gpio_irq = gpio_config->gpio_irq[pin];
640 		return -ENOTSUP;
664 		 * modifying edge mode selection register (WUBEMR and WUEMR).
701 	.index = (uint8_t)(DT_INST_REG_ADDR(inst) -                \