Home
last modified time | relevance | path

Searched +full:rx +full:- +full:invert (Results 1 – 17 of 17) sorted by relevance

/Zephyr-latest/dts/bindings/serial/
Duart-controller-pin-inversion.yaml2 # SPDX-License-Identifier: Apache-2.0
7 tx-invert:
10 Invert the binary logic of tx pin. When enabled, physical logic levels are inverted and
12 rx-invert:
15 Invert the binary logic of rx pin. When enabled, physical logic levels are inverted and
Dst,stm32-uart-base.yaml2 # SPDX-License-Identifier: Apache-2.0
5 description: STM32 UART-BASE
8 - name: uart-controller.yaml
9 property-blocklist:
10 - clock-frequency
11 - name: pinctrl-device.yaml
12 - name: reset-device.yaml
13 - name: uart-controller-pin-inversion.yaml
28 single-wire:
31 Enable the single wire half-duplex communication.
[all …]
/Zephyr-latest/dts/bindings/input/
Dfutaba,sbus.yaml2 # SPDX-License-Identifier: Apache-2.0
8 SBUS is an single-wire inverted serial protocol so either you need to use
9 the rx-invert feature of your serial driver or use an external signal inverter.
49 include: [base.yaml, uart-device.yaml]
51 child-binding:
53 SBUS Channel to input-event-code binding
62 Valid range: 1 - 16
/Zephyr-latest/dts/bindings/pinctrl/
Dnordic,nrf-pinctrl.yaml2 # SPDX-License-Identifier: Apache-2.0
7 node to route UART0 RX to pin P0.1 and enable the pull-up resistor on the
20 /* You can put this in places like a board-pinctrl.dtsi file in
35 /* both P0.3 and P0.4 are configured with pull-up */
36 bias-pull-up;
43 state. You would specify the low-power configuration for the same device
52 include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h header file.
55 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
58 - bias-disable: Disable pull-up/down (default behavior, not required).
59 - bias-pull-up: Enable pull-up resistor.
[all …]
/Zephyr-latest/include/zephyr/drivers/
Di2s.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Public APIs for the I2S (Inter-IC Sound) bus drivers.
20 * @brief I2S (Inter-IC Sound) Interface
23 * as common non-standard extensions such as PCM Short/Long Frame Sync,
55 * -. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-. .-.
56 * SCK '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '-' '
57 * -. .-------------------------------.
58 * WS '-------------------------------' '----
59 * -.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.---.
61 * -'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'---'
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dnrf-pinctrl.h3 * SPDX-License-Identifier: Apache-2.0
10 * The whole nRF pin configuration information is encoded in a 32-bit bitfield
13 * - 31..24: Pin function.
14 * - 19-23: Reserved.
15 * - 18: Associated peripheral belongs to GD FAST ACTIVE1 (nRF54H only)
16 * - 17: Clockpin enable.
17 * - 16: Pin inversion mode.
18 * - 15: Pin low power mode.
19 * - 14..11: Pin output drive configuration.
20 * - 10..9: Pin pull configuration.
[all …]
/Zephyr-latest/drivers/dai/nxp/esai/
Desai.h4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/dai/esai.h>
32 /* used to fetch the depth of the FIFO. If the "fifo-depth" property is
40 /* used to fetch the TX FIFO watermark value. If the "tx-fifo-watermark"
46 /* used to fetch the RX FIFO watermark value. If the "rx-fifo-watermark"
61 /* used to fetch the word width. If the "word-width" property is not specified,
71 /* invert a clock's polarity. This works because a clock's polarity
76 #define _ESAI_SLOT_WORD_WIDTH_IS_VALID(width) (!(((width) - 8) % 4))
88 ((w) < 24 ? ((s) - (w) + (((w) - 8) / 4)) : ((s) < 32 ? 0x1e : 0x1f))
94 #define ESAI_WORD_ALIGNMENT(word_width) ((32 - (word_width)) / 4)
[all …]
/Zephyr-latest/drivers/serial/
Duart_mcux_lpuart.c2 * Copyright 2017,2021,2023-2024 NXP
5 * SPDX-License-Identifier: Apache-2.0
133 struct mcux_lpuart_data *data = dev->data; in mcux_lpuart_pm_policy_state_lock_get()
135 if (!data->pm_state_lock_on) { in mcux_lpuart_pm_policy_state_lock_get()
136 data->pm_state_lock_on = true; in mcux_lpuart_pm_policy_state_lock_get()
143 struct mcux_lpuart_data *data = dev->data; in mcux_lpuart_pm_policy_state_lock_put()
145 if (data->pm_state_lock_on) { in mcux_lpuart_pm_policy_state_lock_put()
146 data->pm_state_lock_on = false; in mcux_lpuart_pm_policy_state_lock_put()
154 const struct mcux_lpuart_config *config = dev->config; in mcux_lpuart_poll_in()
155 uint32_t flags = LPUART_GetStatusFlags(config->base); in mcux_lpuart_poll_in()
[all …]
Duart_lpc11u6x.c4 * SPDX-License-Identifier: Apache-2.0
19 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_poll_in()
21 if (!(cfg->uart0->lsr & LPC11U6X_UART0_LSR_RDR)) { in lpc11u6x_uart0_poll_in()
22 return -1; in lpc11u6x_uart0_poll_in()
24 *c = cfg->uart0->rbr; in lpc11u6x_uart0_poll_in()
31 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_poll_out()
33 while (!(cfg->uart0->lsr & LPC11U6X_UART0_LSR_THRE)) { in lpc11u6x_uart0_poll_out()
35 cfg->uart0->thr = c; in lpc11u6x_uart0_poll_out()
40 const struct lpc11u6x_uart0_config *cfg = dev->config; in lpc11u6x_uart0_err_check()
44 lsr = cfg->uart0->lsr; in lpc11u6x_uart0_err_check()
[all …]
/Zephyr-latest/drivers/dai/nxp/sai/
Dsai.h3 * SPDX-License-Identifier: Apache-2.0
51 /* used to convert the clock-names property into an array of clock names */
72 /* used to convert a clock-names property into an array of clock names. If the
89 /* used to parse the tx-fifo-watermark property. If said property is not
97 /* used to parse the rx-fifo-watermark property. If said property is not
107 POINTER_TO_UINT(&(UINT_TO_I2S(DT_INST_REG_ADDR(inst))->TDR[idx]))
111 POINTER_TO_UINT(&(UINT_TO_I2S(DT_INST_REG_ADDR(inst))->RDR[idx]))
113 /* internal macro used to retrieve the default TX/RX FIFO's size (in FIFO words) */
117 /* used to retrieve the TX/RX FIFO's size (in FIFO words) */
162 /* invert a clock's polarity. This works because a clock's polarity is expressed
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_intel.c2 * Copyright (c) 2018-2019 Intel Corporation
4 * SPDX-License-Identifier: Apache-2.0
17 * Due to GPIO callback only allowing 32 pins (as a 32-bit mask) at once,
18 * each set is further sub-divided into multiple devices, so
30 #include <zephyr/dt-bindings/interrupt-controller/intel-ioapic.h>
92 ((const struct gpio_intel_config *)(_dev)->config)
93 #define DEV_DATA(_dev) ((struct gpio_intel_data *)(_dev)->data)
130 #define REG_GPI_INT_STS_BASE_GET(data) (data)->intr_stat_reg
132 #define REG_GPI_INT_EN_BASE_GET(data) (data)->intr_stat_reg + 0x20
136 #define GPIO_PAD_OWNERSHIP_GET(data, pin, offset) (data)->pad_owner_reg + (((pin) / 8) * 0x4)
[all …]
/Zephyr-latest/scripts/utils/
Dpinctrl_nrf_migrate.py4 # SPDX-License-Identifier: Apache-2.0
11 nRF-based boards using the old <signal>-pin properties to select peripheral
13 file by removing old pin-related properties replacing them with pinctrl states.
14 A board-pinctrl.dtsi file will be generated containing the configuration for
28 -i path/to/board.dts
29 [--no-backup]
30 [--skip-nrf-check]
31 [--header ""]
35 .. code-block:: devicetree
41 tx-pin = <5>;
[all …]
/Zephyr-latest/boards/nxp/vmu_rt1170/
Dvmu_rt1170_mimxrt1176_cm7.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <zephyr/dt-bindings/led/led.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
24 pwm-led0 = &buzzer0;
25 mcuboot-button0 = &arming_button;
34 zephyr,shell-uart = &lpuart1;
36 zephyr,flash-controller = &mx25um51345g;
38 zephyr,code-partition = &slot0_partition;
39 zephyr,uart-mcumgr = &lpuart1;
[all …]
/Zephyr-latest/doc/releases/
Drelease-notes-3.7.rst10 This release is the last non-maintenance 3.x release and, as such, will be the next
18 * A long-awaited :ref:`HTTP Server <http_server_interface>` library, and associated service API,
21 * :ref:`POSIX support <posix_support>` has been extended, with most Options of the IEEE 1003-2017
25 * Bluetooth Host has been extended with support for the Nordic UART Service (NUS), Hands-free Audio
29 :ref:`read-then-decode approach <sensor-read-and-decode>` that enables more types of sensors and
35 * Trusted Firmware-M (TF-M) 2.1.0 and Mbed TLS 3.6.0 have been integrated into Zephyr.
39 1588) allows to synchronize time across devices with sub-microsecond accuracy.
52 * 1-Wire
71 :ref:`pinctrl-guide` for more details.
88 * CVE-2024-3077 `Zephyr project bug tracker GHSA-gmfv-4vfh-2mh8
[all …]
Drelease-notes-3.1.rst61 * Split CAN classic and CAN-FD APIs:
90 was moved from Kconfig to :ref:`devicetree <dt-guide>`.
91 See the :dtcompatible:`st,stm32f1-pinctrl` devicetree binding for more information.
182 * MIPI-DSI
184 * Added a :ref:`MIPI-DSI api <mipi_dsi_api>`. This is an experimental API,
196 * Added support for enabling/disabling CAN-FD mode at runtime using :c:macro:`CAN_MODE_FD`.
220 * Added support for Provisioners over PB-GATT
231 * Implemented ISO-AL TX unframed fragmentation
232 * Added support for back-to-back receiving of PDUs on nRF5x platforms
249 newly created informational-only callback struct :c:struct:`bt_conn_auth_info_cb`.
[all …]
/Zephyr-latest/boards/native/doc/
Dcomponents_bsim.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- Do not edit this file with editors other than draw.io -->
3 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
4 …-0.5 -0.5 471 441" class="ge-export-svg-auto" content="&lt;mxfile host=&quot;app.diagrams.net&quot…
/Zephyr-latest/cmake/modules/
Dextensions.cmake1 # SPDX-License-Identifier: Apache-2.0
14 # 1. Zephyr-aware extensions
21 # 2. Kconfig-aware extensions
23 # 3. CMake-generic extensions
44 # 1. Zephyr-aware extensions
49 # "zephyr". zephyr is a catch-all CMake library for source files that
52 # [0] https://cmake.org/cmake/help/latest/manual/cmake-buildsystem.7.html
66 # As a very high-level introduction here are two call graphs that are
72 # zephyr_library_compile_options() --> target_compile_options()
75 # zephyr_cc_option() ---> target_cc_option()
[all …]