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/Zephyr-latest/samples/boards/nxp/mimxrt1170_evk_cm7/magic_addr/
Dsample.yaml2 description: RT11xx FLEXRAM Magic Addr example
3 name: magic addr
6 - mimxrt1170_evk/mimxrt1176/cm7
7 - mimxrt1160_evk/mimxrt1166/cm7
9 - pytest
12 filter: dt_node_prop_enabled("flexram", "flexram,has-magic-addr")
/Zephyr-latest/dts/bindings/memory-controllers/
Dnxp,flexram.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP FlexRAM on-chip ram controller
17 flexram,has-magic-addr:
20 Whether or not the flexram on the SOC has the
21 magic address feature, which allows for an interrupt
24 flexram,num-ram-banks:
30 flexram,bank-size:
36 flexram,bank-spec:
44 flexram,tcm-read-wait-mode:
49 flexram,tcm-write-wait-mode:
/Zephyr-latest/drivers/flash/
Dflash_stm32_qspi.c6 * SPDX-License-Identifier: Apache-2.0
58 /* In dual-flash mode, total size is twice the size of one flash component */
125 * If set addressed operations should use 32-bit rather than
126 * 24-bit addresses.
138 struct flash_stm32_qspi_data *dev_data = dev->data; in qspi_lock_thread()
140 k_sem_take(&dev_data->sem, K_FOREVER); in qspi_lock_thread()
145 struct flash_stm32_qspi_data *dev_data = dev->data; in qspi_unlock_thread()
147 k_sem_give(&dev_data->sem); in qspi_unlock_thread()
153 struct flash_stm32_qspi_data *dev_data = dev->data; in qspi_set_address_size()
155 if (dev_data->flag_access_32bit) { in qspi_set_address_size()
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Dspi_nor.c2 * Copyright (c) 2018 Savoir-Faire Linux.
8 * SPDX-License-Identifier: Apache-2.0
36 * * Some devices support a Deep Power-Down mode which reduces current
41 * * PM_DEVICE_STATE_SUSPENDED corresponds to deep-power-down mode;
63 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config)
66 /* MXICY Low-power/high perf mode is second bit in configuration register 2 */
72 /* Build-time data associated with the device. */
92 /* Expected JEDEC ID, from jedec-id property */
96 /* Optional support for entering 32-bit address mode. */
101 /* Length of BFP structure, in 32-bit words. */
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Dflash_stm32_xspi.c4 * SPDX-License-Identifier: Apache-2.0
23 #include <zephyr/dt-bindings/flash_controller/xspi.h>
59 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_lock_thread()
61 k_sem_take(&dev_data->sem, K_FOREVER); in xspi_lock_thread()
66 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_unlock_thread()
68 k_sem_give(&dev_data->sem); in xspi_unlock_thread()
73 struct flash_stm32_xspi_data *dev_data = dev->data; in xspi_send_cmd()
76 LOG_DBG("Instruction 0x%x", cmd->Instruction); in xspi_send_cmd()
78 dev_data->cmd_status = 0; in xspi_send_cmd()
80 hal_ret = HAL_XSPI_Command(&dev_data->hxspi, cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE); in xspi_send_cmd()
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Dflash_stm32_ospi.c5 * SPDX-License-Identifier: Apache-2.0
20 #include <zephyr/dt-bindings/flash_controller/ospi.h>
187 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_lock_thread()
189 k_sem_take(&dev_data->sem, K_FOREVER); in ospi_lock_thread()
194 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_unlock_thread()
196 k_sem_give(&dev_data->sem); in ospi_unlock_thread()
201 const struct flash_stm32_ospi_config *dev_cfg = dev->config; in ospi_send_cmd()
202 struct flash_stm32_ospi_data *dev_data = dev->data; in ospi_send_cmd()
205 LOG_DBG("Instruction 0x%x", cmd->Instruction); in ospi_send_cmd()
207 dev_data->cmd_status = 0; in ospi_send_cmd()
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Dflash_mcux_flexspi_nor.c4 * SPDX-License-Identifier: Apache-2.0
39 read-while-write hazards. This configuration is not recommended."
91 /* 1S-1S-1S flash read command, should be compatible with all SPI nor flashes */
107 /* Standard 1S-1S-1S flash write command, can be switched to 1S-1S-4S when QE is set */
155 .port = data->port, in flash_flexspi_nor_read_id_helper()
165 ret = memc_flexspi_transfer(&data->controller, &transfer); in flash_flexspi_nor_read_id_helper()
177 struct flash_flexspi_nor_data *data = dev->data; in flash_flexspi_nor_read_id()
187 .port = data->port, in flash_flexspi_nor_read_status()
197 return memc_flexspi_transfer(&data->controller, &transfer); in flash_flexspi_nor_read_status()
204 .port = data->port, in flash_flexspi_nor_write_enable()
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/Zephyr-latest/subsys/fs/zms/
Dzms.c3 * SPDX-License-Identifier: Apache-2.0
18 static int zms_prev_ate(struct zms_fs *fs, uint64_t *addr, struct zms_ate *ate);
20 static int zms_get_sector_cycle(struct zms_fs *fs, uint64_t addr, uint8_t *cycle_cnt);
21 static int zms_get_sector_header(struct zms_fs *fs, uint64_t addr, struct zms_ate *empty_ate,
32 /* 32-bit integer hash function found by https://github.com/skeeto/hash-prospector. */ in zms_lookup_cache_pos()
47 uint64_t addr; in zms_lookup_cache_rebuild() local
53 memset(fs->lookup_cache, 0xff, sizeof(fs->lookup_cache)); in zms_lookup_cache_rebuild()
54 addr = fs->ate_wra; in zms_lookup_cache_rebuild()
57 /* Make a copy of 'addr' as it will be advanced by zms_prev_ate() */ in zms_lookup_cache_rebuild()
58 ate_addr = addr; in zms_lookup_cache_rebuild()
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/Zephyr-latest/drivers/dma/
Ddma_iproc_pax.h4 * SPDX-License-Identifier: Apache-2.0
10 /* Broadcom PAX-DMA RM register defines */
14 /* Per-Ring register offsets */
239 * AE_TIMEOUT is (2^AE_TIMEOUT_BITS) - (2 * NumOfAEs * 2^FIFO_DEPTH_BITS)
241 * timeout val = 2^32 - 2*2*2^5
268 /* Register Per-ring RING_COMMON_CONTROL fields */
293 * set, completion write pointers has to be checked on each interrupt
332 #define PAX_DMA_RING_BD_ALIGN_CHECK(addr) \ argument
333 (!((addr) & ((0x1 << RING_BD_ALIGN_ORDER) - 1)))
334 #define RING_CMPL_ALIGN_CHECK(addr) \ argument
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/Zephyr-latest/cmake/
Dmcuboot.cmake1 # Copyright (c) 2020-2023 Nordic Semiconductor ASA
2 # SPDX-License-Identifier: Apache-2.0
7 # It builds signed binaries using imgtool as a post-processing step
11 # function to avoid polluting the top-level scope.
14 # Property magic which makes west flash choose the signed build
72 …ith pip3, or add the mcuboot repository to the west manifest and ensure it has a scripts/imgtool.p…
80 dt_prop(write_block_size PATH "${flash_node}" PROPERTY "write-block-size")
98 --version ${CONFIG_MCUBOOT_IMGTOOL_SIGN_VERSION} --header-size ${CONFIG_ROM_START_OFFSET}
99 --slot-size ${slot_size})
114 set(imgtool_args --key "${keyfile}" ${imgtool_args})
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/Zephyr-latest/subsys/llext/
Dllext_load.c5 * SPDX-License-Identifier: Apache-2.0
31 * - The input `struct llext` and fields in `struct loader` are zero-filled
34 * - If some function called by do_llext_load allocates memory, it does so by
36 * - do_llext_load() will clean up the memory allocated by the functions it
44 enum llext_mem mem_idx = ldr->sect_map[sh_ndx].mem_idx; in llext_loaded_sect_ptr()
50 return (const uint8_t *)ext->mem[mem_idx] + ldr->sect_map[sh_ndx].offset; in llext_loaded_sect_ptr()
69 ret = llext_read(ldr, &ldr->hdr, sizeof(ldr->hdr)); in llext_load_elf_data()
76 if (memcmp(ldr->hdr.e_ident, ELF_MAGIC, sizeof(ELF_MAGIC)) != 0) { in llext_load_elf_data()
77 LOG_HEXDUMP_ERR(ldr->hdr.e_ident, 16, "Invalid ELF, magic does not match"); in llext_load_elf_data()
78 return -ENOEXEC; in llext_load_elf_data()
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/Zephyr-latest/subsys/mgmt/mcumgr/grp/img_mgmt/src/
Dimg_mgmt.c2 * Copyright (c) 2018-2021 mcumgr authors
3 * Copyright (c) 2022-2024 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
102 const char *img_mgmt_err_str_magic_mismatch = "magic mismatch";
108 const char *img_mgmt_err_str_image_bad_flash_addr = "img addr mismatch";
130 zcbor_state_t *zse = ctxt->writer->zs; in img_mgmt_reset_zse()
133 net_buf_reset(ctxt->writer->nb); in img_mgmt_reset_zse()
134 ctxt->writer->nb->len = sizeof(struct smp_hdr); in img_mgmt_reset_zse()
135 zcbor_new_encode_state(zse, ARRAY_SIZE(ctxt->writer->zs), in img_mgmt_reset_zse()
136 ctxt->writer->nb->data + sizeof(struct smp_hdr), in img_mgmt_reset_zse()
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/Zephyr-latest/soc/intel/intel_adsp/tools/
Dcavstool.py3 # SPDX-License-Identifier: Apache-2.0
19 log = logging.getLogger("cavs-fw")
23 HUGEPAGE_FILE = "/dev/hugepages/cavs-fw-dma.tmp."
28 # Window 1 is the IPC "inbox" (host-writable memory, just 384 bytes currently)
30 # Window 3 is winstream-formatted log output
43 # pylint: disable=duplicate-code
106 self.regs.LVI = self.n_bufs - 1
214 p = runx(f"grep -iEl 'PCI_CLASS=40(10|38)0' /sys/bus/pci/devices/*/uevent")
234 runx(f"rmmod -f {mod}")
313 # 128-byte (minimum size and alignment) buffer after the main one, and put
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/Zephyr-latest/dts/arm/nxp/
Dnxp_rt11xx_cm7.dtsi2 * Copyright 2021-2023 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/dt-bindings/memory-controller/nxp,flexram.h>
12 /delete-node/ cpu@1;
16 * to the M7 core alone, hence this EDMA controller has been designated M7 only.
23 /delete-node/ dma-controller@40c14000;
31 #address-cells = <1>;
32 #size-cells = <1>;
34 flexram,bank-size = <32>;
35 flexram,num-ram-banks = <16>;
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/Zephyr-latest/drivers/i2c/
Di2c_dw.c1 /* dw_i2c.c - I2C file for Design Ware */
5 * Copyright (c) 2022 Andrei-Edward Popa
7 * SPDX-License-Identifier: Apache-2.0
49 #include "i2c-priv.h"
76 const struct i2c_dw_rom_config *const rom = dev->config; in cb_i2c_idma_transfer()
77 struct i2c_dw_dev_config *const dw = dev->data; in cb_i2c_idma_transfer()
79 dma_stop(rom->dma_dev, channel); in cb_i2c_idma_transfer()
83 dw->xfr_status = true; in cb_i2c_idma_transfer()
85 dw->xfr_status = false; in cb_i2c_idma_transfer()
94 write_rdlr(fifo_depth - 1, reg_base); in i2c_dw_set_fifo_th()
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/Zephyr-latest/scripts/dts/python-devicetree/tests/
Dtest_dtlib.py2 # SPDX-License-Identifier: BSD-3-Clause
23 # - to stop on the first failure with shorter traceback output,
24 # use '-x --tb=native'
25 # - to drop into a debugger on failure, use '--pdb'
26 # - to run a particular test function or functions, use
27 # '-k test_function_pattern_goes_here'
34 fd, path = tempfile.mkstemp(prefix='pytest-', suffix='.dts')
36 os.write(fd, dts.encode('utf-8'))
44 representation is expected[1:-1].
52 expected = expected[1:-1]
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/Zephyr-latest/doc/releases/
Drelease-notes-3.6.rst12 * New :ref:`GNSS subsystem <gnss_api>` added, enabling geo-awareness in Zephyr applications.
13 * New API and drivers introduced for interfacing with :ref:`keyboard matrices <gpio-kbd>`.
16 * Integrated Trusted Firmware-M (TF-M) 2.0, including an update to Mbed TLS 3.5.2.
23 * Over 30 new supported boards, spanning all Zephyr-supported architectures.
37 * CVE-2023-5779 `Zephyr project bug tracker GHSA-7cmj-963q-jj47
38 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-7cmj-963q-jj47>`_
40 * CVE-2023-6249 `Zephyr project bug tracker GHSA-32f5-3p9h-2rqc
41 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-32f5-3p9h-2rqc>`_
43 * CVE-2023-6749 `Zephyr project bug tracker GHSA-757h-rw37-66hw
44 <https://github.com/zephyrproject-rtos/zephyr/security/advisories/GHSA-757h-rw37-66hw>`_
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Drelease-notes-1.13.rst16 * Support for IEEE 802.1AS-2011 generalized Precision Time Protocol (gPTP)
23 * Basic support for Arm TrustZone in Armv8-M
42 * arch: arm: implement ARMv8-M MPU driver
44 * arch: arm: macro API for defining non-secure entry functions
48 * arch: ARM: Change the march used by cortex-m0 and cortex-m0plus
50 * arch: arm: basic Arm TrustZone-M functionality for Cortex-M23 and Cortex-M33
51 * arch: arm: built-in stack protection using Armv8-M SPLIM registers
52 * arch: arm: API for using TT intrinsics in Secure/Non-Secure Armv8-M firmware
63 * riscv32: riscv-privilege: Microsemi Mi-V support
99 * modem: Added Wistron WNC-M14A2A LTE-M Modem driver
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Drelease-notes-1.12.rst12 - Asymmetric multiprocessing (AMP) via integration of OpenAMP
13 - Persistent storage support for Bluetooth Low Energy including Mesh
14 - 802.1Q - Virtual Local Area Network (VLAN) traffic on an Ethernet network
15 - Support multiple concurrent filesystem devices, partitions, and FS types
16 - Ethernet network management interface
17 - Networking traffic prioritization on a per-connection basis
18 - Support for Ethernet statistical counters
19 - Support for TAP net device on the native POSIX port
20 - Command-line Zephyr meta-tool "west"
21 - SPI slave support
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/Zephyr-latest/kernel/
Dthread.c2 * Copyright (c) 2010-2014 Wind River Systems, Inc.
4 * SPDX-License-Identifier: Apache-2.0
85 arch_current_thread()->custom_data = value; in z_impl_k_thread_custom_data_set()
98 return arch_current_thread()->custom_data; in z_impl_k_thread_custom_data_get()
126 return thread->base.prio; in z_impl_k_thread_priority_get()
145 strncpy(thread->name, str, CONFIG_THREAD_MAX_NAME_LEN - 1); in z_impl_k_thread_name_set()
146 thread->name[CONFIG_THREAD_MAX_NAME_LEN - 1] = '\0'; in z_impl_k_thread_name_set()
159 SYS_PORT_TRACING_OBJ_FUNC(k_thread, name_set, thread, -ENOSYS); in z_impl_k_thread_name_set()
161 return -ENOSYS; in z_impl_k_thread_name_set()
173 return -EINVAL; in z_vrfy_k_thread_name_set()
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/Zephyr-latest/soc/espressif/esp32c3/
Ddefault.ld3 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/linker/linker-defs.h>
9 #include <zephyr/linker/linker-tool.h>
26 user_dram_end = (user_iram_end - IRAM_DRAM_OFFSET);
27 user_idram_size = (user_dram_end - user_dram_seg_org);
63 FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40
67 FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100
84 * As C3 only has RTC fast memory, this is not configurable like
112 /* 0. Magic byte for load header */
123 LONG(ADDR(.iram0.text))
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/Zephyr-latest/scripts/dts/
Dgen_defines.py3 # Copyright (c) 2019 - 2020 Nordic Semiconductor ASA
6 # SPDX-License-Identifier: BSD-3-Clause
11 # Note: Do not access private (_-prefixed) identifiers from edtlib here (and
25 sys.path.insert(0, os.path.join(os.path.dirname(__file__), 'python-devicetree',
46 with open(args.header_out, "w", encoding="utf-8") as header_file:
58 # Check to see if we have duplicate "zephyr,memory-region" property values.
61 if 'zephyr,memory-region' in node.props:
62 region = node.props['zephyr,memory-region'].val
64 sys.exit(f"ERROR: Duplicate 'zephyr,memory-region' ({region}) properties "
74 out_comment("Node's name with unit-address:")
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/Zephyr-latest/soc/espressif/esp32c6/
Ddefault.ld3 * SPDX-License-Identifier: Apache-2.0
8 #include <zephyr/linker/linker-defs.h>
9 #include <zephyr/linker/linker-tool.h>
25 user_sram_size = (user_sram_end - user_sram_org);
60 FLASH (R): org = 0x40, len = FLASH_SIZE - 0x40
64 FLASH (R): org = 0x0, len = FLASH_SIZE - 0x100
73 len = 0x2000 - RESERVE_RTC_MEM
75 lp_reserved_seg(RW) : org = LPSRAM_IRAM_START + 0x2000 - RESERVE_RTC_MEM,
84 * C6 has no distinguished LP(RTC) fast and slow memory sections,
113 /* 0. Magic byte for load header */
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