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/Zephyr-latest/drivers/sensor/microchip/mchp_tach_xec/
DKconfig18 prompt "Number of tach edges"
21 This value represents the number of Tach edges that
26 bool "Configure 9 tach edges or 4 tach periods"
29 bool "Configure 5 tach edges or 2 tach periods"
32 bool "Configure 3 tach edges or 1 tach period"
35 bool "Configure 2 tach edges or 1/2 tach period"
Dtach_mchp_xec.c56 struct tach_regs * const tach = cfg->regs; in tach_xec_sample_fetch() local
63 if (tach->STATUS & MCHP_TACH_STS_CNT_RDY) { in tach_xec_sample_fetch()
65 tach->CONTROL >> MCHP_TACH_CTRL_COUNTER_POS; in tach_xec_sample_fetch()
133 struct tach_regs * const tach = cfg->regs; in tach_xec_pm_action() local
139 tach->CONTROL |= MCHP_TACH_CTRL_EN; in tach_xec_pm_action()
144 if (tach->CONTROL & MCHP_TACH_CTRL_EN) { in tach_xec_pm_action()
146 data->control = tach->CONTROL; in tach_xec_pm_action()
147 tach->CONTROL &= (~MCHP_TACH_CTRL_EN); in tach_xec_pm_action()
161 struct tach_regs * const tach = cfg->regs; in tach_xec_init() local
166 LOG_ERR("XEC TACH pinctrl init failed (%d)", ret); in tach_xec_init()
[all …]
/Zephyr-latest/soc/microchip/mec/common/reg/
Dmec_tach.h16 /* TACH Control register */
24 /* Enable TACH operation */
37 /* Select TACH edges for counter increment */
54 /* Read-only latched TACH pulse counter */
60 * TACH Status register
75 /* TACH High Limit Register */
79 /* TACH Low Limit Register */
83 /** @brief Tachometer Registers (TACH) */
/Zephyr-latest/include/zephyr/drivers/pwm/
Dmax31790.h29 * to be interpreted as TACH target count. This basically is the number of internal
30 * pulses which occur during each TACH period. Hence, a bigger value means a slower
31 * rotation of the fan. The details about the TACH target count has to be calculated
38 * This represents a multiplicator for the TACH count and should be chosen depending
/Zephyr-latest/dts/bindings/tach/
Dmicrochip,xec-tach.yaml6 compatible: "microchip,xec-tach"
8 include: [tach.yaml, pinctrl-device.yaml]
Dene,kb1200-tach.yaml6 compatible: "ene,kb1200-tach"
8 include: [tach.yaml, pinctrl-device.yaml]
Dite,it8xxx2-tach.yaml6 compatible: "ite,it8xxx2-tach"
8 include: [tach.yaml, pinctrl-device.yaml]
Dnuvoton,npcx-tach.yaml6 compatible: "nuvoton,npcx-tach"
8 include: [tach.yaml, pinctrl-device.yaml]
Dtach.yaml8 bus: tach
/Zephyr-latest/dts/arm/ene/
Dkb1200.dtsi218 tach0: tach@40100000 {
219 compatible = "ene,kb1200-tach";
224 tach1: tach@40100010 {
225 compatible = "ene,kb1200-tach";
230 tach2: tach@40100020 {
231 compatible = "ene,kb1200-tach";
236 tach3: tach@40100030 {
237 compatible = "ene,kb1200-tach";
/Zephyr-latest/drivers/sensor/maxim/max31790/
Dmax31790_fan_speed.c81 LOG_WRN("%s: tach count is zero", dev->name); in max31790_fan_speed_sample_fetch()
84 LOG_DBG("%s: %i tach periods counted, %i tach count", dev->name, in max31790_fan_speed_sample_fetch()
/Zephyr-latest/boards/ite/it82xx2_evb/
Dit82xx2_evb.yaml21 - tach
/Zephyr-latest/drivers/sensor/ene_tach_kb1200/
Dtach_ene_kb1200.c30 /* TACH local functions */
58 /* TACH api functions */
109 /* TACH driver registration */
/Zephyr-latest/boards/nuvoton/npcx4m8f_evb/
Dnpcx4m8f_evb.yaml24 - tach
/Zephyr-latest/boards/nuvoton/npcx9m6f_evb/
Dnpcx9m6f_evb.yaml24 - tach
/Zephyr-latest/boards/microchip/mec1501modular_assy6885/
Dmec1501modular_assy6885.yaml25 - tach
/Zephyr-latest/drivers/sensor/nuvoton/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c91 /* TACH inline local functions */
216 /* TACH local functions */
252 /* TACH api functions */
294 * RPM = (f * 60) / (n * TACH) in tach_npcx_channel_get()
297 * TACH = Captured counts of tachometer in tach_npcx_channel_get()
311 /* TACH driver registration */
/Zephyr-latest/dts/arm/microchip/
Dmec1501hsz.dtsi483 tach0: tach@40006000 {
484 compatible = "microchip,xec-tach";
493 tach1: tach@40006010 {
494 compatible = "microchip,xec-tach";
503 tach2: tach@40006020 {
504 compatible = "microchip,xec-tach";
513 tach3: tach@40006030 {
514 compatible = "microchip,xec-tach";
Dmec172x_common.dtsi590 tach0: tach@40006000 {
591 compatible = "microchip,xec-tach";
600 tach1: tach@40006010 {
601 compatible = "microchip,xec-tach";
610 tach2: tach@40006020 {
611 compatible = "microchip,xec-tach";
620 tach3: tach@40006030 {
621 compatible = "microchip,xec-tach";
Dmec5.dtsi416 tach0: tach@40006000 {
423 tach1: tach@40006010 {
430 tach2: tach@40006020 {
437 tach3: tach@40006030 {
/Zephyr-latest/dts/bindings/clock/
Dmicrochip,xec-pcr.yaml22 PWM and TACH clock domain divided down from 48 MHz AHB clock. The
/Zephyr-latest/drivers/sensor/ite/ite_tach_it8xxx2/
Dtach_ite_it8xxx2.c189 LOG_ERR("Tach channel %d, only support 0 or 1", tach_ch); in tach_it8xxx2_init()
196 LOG_ERR("Failed to configure TACH pins"); in tach_it8xxx2_init()
/Zephyr-latest/dts/arm/nuvoton/npcx/
Dnpcx.dtsi452 tach1: tach@400e1000 {
453 compatible = "nuvoton,npcx-tach";
459 tach2: tach@400e3000 {
460 compatible = "nuvoton,npcx-tach";
/Zephyr-latest/dts/riscv/ite/
Dit8xxx2.dtsi642 tach0: tach@f0181e {
643 compatible = "ite,it8xxx2-tach";
651 tach1: tach@f01820 {
652 compatible = "ite,it8xxx2-tach";
/Zephyr-latest/boards/ene/kb1200_evb/doc/
Dindex.rst50 | TACH | on-chip | tachometer sensor |

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