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/Zephyr-latest/boards/nordic/nrf52833dk/
DCMakeLists.txt1 # SPDX-License-Identifier: Apache-2.0
6 # residing in system_nrf52820.c and SoC dependent routines in nrfx_coredep.h.
/Zephyr-latest/soc/nxp/mcx/mcxc/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
28 Include the 16-byte flash configuration field that stores default
36 default $(dt_node_int_prop_hex,/soc/flash-controller@40020000,config-field-offset)
43 Leave SOC watchdog timer enabled at boot. The specific timeout
44 and clock configuration of the watchdog at boot is SOC dependent.
47 the SOC requires watchdog configuration before initial expiration
/Zephyr-latest/boards/nordic/nrf52dk/
DCMakeLists.txt1 # SPDX-License-Identifier: Apache-2.0
6 # residing in system_nrf52810.c and SoC dependent routines in nrfx_coredep.h.
/Zephyr-latest/boards/nordic/nrf52840dk/
DCMakeLists.txt3 # SPDX-License-Identifier: Apache-2.0
7 # residing in system_nrf52811.c and SoC dependent routines in nrfx_coredep.h.
/Zephyr-latest/dts/bindings/counter/
Datmel,sam-tc.yaml1 # SPDX-License-Identifier: Apache-2.0
5 compatible: "atmel,sam-tc"
8 - name: base.yaml
9 - name: pinctrl-device.yaml
25 Valid range: 0 - 2
30 Clock source selection as defined by TCCLKS bit-field of TC_CMR
38 samv71, samv71b SoC series.
40 reg-cmr:
47 properties like channel-num, pinctrl-0 this allows e.g. to configure
51 reg-rc:
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Despressif,esp32-timer.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Espressif's general-purpose Timers.
7 is SoC-dependent.
32 - 0
33 - 1
41 - 0
42 - 1
51 Values above that range will be 16-bit-masked. Values 0 and 1 will be
56 compatible: "espressif,esp32-timer"
/Zephyr-latest/soc/atmel/sam0/common/
DKconfig.samd2x1 # SPDX-License-Identifier: Apache-2.0
10 dependent on the device operationg conditions.
16 This can then be selected as the main clock reference for the SOC.
22 This can then be selected as the main clock reference for the SOC.
28 This can then be selected as the main clock reference for the SOC.
42 This can then be selected as the main clock reference for the SOC.
/Zephyr-latest/drivers/timer/
Drv32m1_lptmr_timer.c4 * SPDX-License-Identifier: Apache-2.0
13 #include <soc.h>
21 * - system clock based on an LPTMR instance, clocked by SIRC output
22 * SIRCDIV3, prescaler divide-by-1, SIRC at 8MHz
23 * - no tickless
56 SYSTEM_TIMER_INSTANCE->CSR |= LPTMR_CSR_TCF(1); /* Rearm timer. */ in lptmr_irq_handler()
63 return cycle_count + SYSTEM_TIMER_INSTANCE->CNR; in sys_clock_cycle_get_32()
81 if ((SCG->SIRCCSR & SCG_SIRCCSR_SIRCEN_MASK) == SCG_SIRCCSR_SIRCEN(0)) { in sys_clock_driver_init()
85 * This is incompatible with this driver, which is SIRC-based. in sys_clock_driver_init()
87 return -ENODEV; in sys_clock_driver_init()
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/Zephyr-latest/dts/bindings/i2s/
Dnxp,mcux-i2s.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: NXP mcux SAI-I2S controller
6 compatible: "nxp,mcux-i2s"
8 include: [i2s-controller.yaml, pinctrl-device.yaml]
17 dma-names:
20 nxp,tx-dma-channel:
25 nxp,rx-dma-channel:
30 nxp,tx-sync-mode:
34 nxp,rx-sync-mode:
38 pre-div:
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/Zephyr-latest/soc/nxp/kinetis/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
14 Set if the oscillator (OSC) module is present in the SoC.
19 Set if the multipurpose clock generator (MCG) module is present in the SoC.
35 Set this option to use the oscillator in low-power mode.
40 Set this option to use the oscillator in high-gain mode.
94 Include the 16-byte flash configuration field that stores default
142 Leave SOC watchdog timer enabled at boot. The specific timeout
143 and clock configuration of the watchdog at boot is SOC dependent.
146 the SOC requires watchdog configuration before initial expiration
/Zephyr-latest/dts/bindings/dma/
Dst,stm32u5-dma.yaml2 # SPDX-License-Identifier: Apache-2.0
5 STM32 DMA controller for the stm32U5 soc family
9 DMA clients connected to the STM32 DMA controller must use a three-cell
17 dma-names = "tx", "rx";
20 1. channel: the stream or channel from 0 to (<dma-channels> - 1).
22 the slot is a value between <0> .. (<dma-requests> - 1).
23 3. channel-config: A 32bit mask specifying the DMA channel configuration
24 which is device dependent:
25 -bit 6-7 : Direction (see dma.h)
30 -bit 9 : Peripheral Increment Address
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Dst,stm32-dma-v2bis.yaml2 # SPDX-License-Identifier: Apache-2.0
5 STM32 DMA controller (V2bis) for the stm32F0, stm32F1 and stm32L1 soc families
11 described in the dma.txt file, using a 2-cell specifier for each
13 1. channel: the dma stream from 1 to <dma-requests>
14 2. channel-config: A 32bit mask specifying the DMA channel configuration
16 which is device dependent see stm32_dma.h:
17 -bit 5 : DMA cyclic mode config
20 -bit 6-7 : Direction (see dma.h)
25 -bit 9 : Peripheral Increment Address
28 -bit 10 : Memory Increment Address
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/Zephyr-latest/boards/native/doc/
Dbsim_boards_design.rst50 The main purpose of these bsim boards is to be test-benches for
80 - Unit tests:
85 - Integration tests on real HW: Allows testing with the real SW
86 components that may be too dependent on the exact HW particularities, and
93 - Integration tests on workstation (what the POSIX arch and these boards enable)
95 - Using bsim boards: Allow testing the embedded SW (or a subset), including
98 - Using bsim boards with the BabbleSim Physical layer simulation allows
102 - Using bsim boards, and the `EDTT`_ framework: With the EDTT framework we can
108 - Using Zephyr's :ref:`native_sim <native_sim>` board: It also allows integration testing of
110 components which are dependent on the HW would not be suited for testing in
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Dlayering.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
3 …g/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:ev="http://www.w3.org/2001/xml-events"
5 viewBox="0 0 439.37 265.039" xml:space="preserve" color-interpolation-filters="sRGB" class="st9">
15 .st1 {fill:#fff2cc;stroke:#000000;stroke-linecap:round;stroke-linejoin:round;stroke-width:0.75}
16 .st2 {fill:#000000;font-family:Arial;font-size:0.916672em}
17 .st3 {fill:#ebf1df;stroke:#000000;stroke-linecap:round;stroke-linejoin:round;stroke-width:0.75}
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20 .st6 {fill:#dbeef3;stroke:#000000;stroke-linecap:round;stroke-linejoin:round;stroke-width:0.75}
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Dlayering_natsim.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
7 color-interpolation-filters="sRGB"
12 inkscape:version="1.1.2 (0a00cf5339, 2022-02-04)"
14 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
26 inkscape:document-units="in"
31 inkscape:window-width="2399"
32 inkscape:window-height="1422"
33 inkscape:window-x="161"
34 inkscape:window-y="0"
35 inkscape:window-maximized="1"
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/Zephyr-latest/include/zephyr/timing/
Dtiming.h4 * SPDX-License-Identifier: Apache-2.0
27 * specified by architecture, SoC or board configuration.
31 * @brief SoC specific Timing Measurement APIs
32 * @defgroup timing_api_soc SoC specific Timing Measurement APIs
36 * using SoC specific timing measurement mechanism.
42 * @brief Initialize the timing subsystem on SoC.
76 * (with SoC dependent code, e.g. by casting to a uint32_t before
91 * This function computes a positive-definite interval between two
192 * (with board dependent code, e.g. by casting to a uint32_t before
207 * This function computes a positive-definite interval between two
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/openisa/hal/RV32M1/
Dcntr.c6 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/interrupt-controller/openisa-intmux.h>
29 RTC->CR |= RTC_CR_SWR_MASK; in cntr_init()
30 RTC->CR &= ~RTC_CR_SWR_MASK; in cntr_init()
36 RTC->TSR = 1; in cntr_init()
39 RTC->CR |= (RTC_CR_CPS(1) | RTC_CR_OSCE(1)); in cntr_init()
43 LPTMR1->CSR = LPTMR_CSR_TEN(0); in cntr_init()
50 LPTMR1->CSR = (LPTMR_CSR_TFC(1) | LPTMR_CSR_TIE(1)); in cntr_init()
53 * PCS = 2: clock source is RTC - 32 kHz clock (SoC dependent) in cntr_init()
56 LPTMR1->PSR = (LPTMR_PSR_PBYP(1) | LPTMR_PSR_PCS(PCS_SOURCE_RTC)); in cntr_init()
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/Zephyr-latest/boards/native/native_sim/
Dirq_handler.c6 * SPDX-License-Identifier: Apache-2.0
19 #include "soc.h"
30 static int currently_running_irq = -1;
61 * needed, swap to a re-enabled thread
82 if (irq_nbr == -1) { in posix_irq_handler()
105 } while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq()) != -1); in posix_irq_handler()
107 _kernel.cpus[0].nested--; in posix_irq_handler()
134 if (hw_irq_ctrl_get_highest_prio_irq() != -1) { in nsif_cpu0_irq_raised_from_sw()
150 * task or fiber level. This routine returns an architecture-dependent
151 * lock-out key representing the "interrupt disable state" prior to the call;
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/Zephyr-latest/boards/native/native_posix/
Dirq_handler.c5 * SPDX-License-Identifier: Apache-2.0
20 #include "soc.h"
29 static int currently_running_irq = -1;
60 * needed, swap to a re-enabled thread
85 while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq()) != -1) { in posix_irq_handler()
99 _kernel.cpus[0].nested--; in posix_irq_handler()
126 if (hw_irq_ctrl_get_highest_prio_irq() != -1) { in posix_irq_handler_im_from_sw()
142 * task or fiber level. This routine returns an architecture-dependent
143 * lock-out key representing the "interrupt disable state" prior to the call;
144 * this key can be passed to irq_unlock() to re-enable interrupts.
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/Zephyr-latest/drivers/usb_c/vbus/
Dusbc_vbus_numaker.c4 * SPDX-License-Identifier: Apache-2.0
19 #include <soc.h>
38 * @brief Initializes the usb-c vbus driver
41 * @retval -ENODEV if dependent TCPC device is not ready
45 const struct numaker_vbus_config *const config = dev->config; in numaker_vbus_init()
46 const struct device *tcpc_dev = config->tcpc_dev; in numaker_vbus_init()
51 return -ENODEV; in numaker_vbus_init()
65 const struct numaker_vbus_config *const config = dev->config; in numaker_vbus_check_level()
66 const struct device *tcpc_dev = config->tcpc_dev; in numaker_vbus_check_level()
75 * @retval -EIO on failure
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/Zephyr-latest/boards/native/nrf_bsim/
Dirq_handler.c4 * SPDX-License-Identifier: Apache-2.0
18 #include "soc.h"
30 static int currently_running_irq = -1;
78 * needed, swap to a re-enabled thread
100 if (irq_nbr == -1) { in posix_irq_handler()
125 } while ((irq_nbr = hw_irq_ctrl_get_highest_prio_irq(cpu_n)) != -1); in posix_irq_handler()
127 _kernel.cpus[0].nested--; in posix_irq_handler()
156 if (hw_irq_ctrl_get_highest_prio_irq(CONFIG_NATIVE_SIMULATOR_MCU_N) != -1) { in posix_irq_handler_im_from_sw()
172 * task or fiber level. This routine returns an architecture-dependent
173 * lock-out key representing the "interrupt disable state" prior to the call;
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/Zephyr-latest/doc/hardware/pinctrl/
Dindex.rst1 .. _pinctrl-guide:
6 This is a high-level guide to pin control. See :ref:`pinctrl_api` for API
13 parameters such as pin direction, pull-up/down resistors, etc. are named **pin
14 controllers**. The pin controller's main users are SoC hardware peripherals,
18 of a peripheral, for example, the slew-rate depending on the operating
19 frequency. The available configuration options are vendor/SoC dependent and can
20 range from simple pull-up/down options to more advanced settings such as
21 debouncing, low-power modes, etc.
23 The way pin control is implemented in hardware is vendor/SoC specific. It is
29 pull-up/down are controlled in the same block via ``CONFIG`` bits. This model is
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/Zephyr-latest/arch/x86/
DKconfig3 # Copyright (c) 2014-2015 Wind River Systems, Inc.
4 # SPDX-License-Identifier: Apache-2.0
13 # CPU Families - the SoC configuration should select the right one.
61 # Configuration common to both IA32 and Intel64 sub-architectures.
65 bool "Run in 64-bit mode"
163 bool "Compiler-generated SSEx instructions for floating point math"
191 This value normally need to be page-aligned.
231 Selects the use of the memory-mapped PCI Express Extended
244 Hidden option to signal building for PC-compatible platforms
274 text segment by 12-16 bytes and is typically ignored if not needed.
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/Zephyr-latest/kernel/paging/
Dstatistics.c4 * SPDX-License-Identifier: Apache-2.0
23 * The frequency of timing functions is highly dependent on
24 * architecture, SoC or board. It is also not available at build time.
60 * (both page-in and page-out).
120 memcpy(stats, &thread->paging_stats, sizeof(thread->paging_stats)); in z_impl_k_mem_paging_thread_stats_get()
179 if (cycles <= hist->bounds[idx]) { in z_paging_histogram_inc()
180 hist->counts[idx]++; in z_paging_histogram_inc()
/Zephyr-latest/drivers/usb_c/ppc/
Dusbc_ppc_numaker.c4 * SPDX-License-Identifier: Apache-2.0
19 #include <soc.h>
38 * @brief Initializes the usb-c ppc driver
41 * @retval -ENODEV if dependent TCPC device is not ready
45 const struct numaker_ppc_config *const config = dev->config; in numaker_ppc_init()
46 const struct device *tcpc_dev = config->tcpc_dev; in numaker_ppc_init()
51 return -ENODEV; in numaker_ppc_init()
62 * @retval -EIO if on failure
66 const struct numaker_ppc_config *const config = dev->config; in numaker_ppc_is_dead_battery_mode()
67 const struct device *tcpc_dev = config->tcpc_dev; in numaker_ppc_is_dead_battery_mode()
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