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/Zephyr-latest/drivers/sensor/adi/adxl345/
Dadxl345_trigger.c24 uint8_t status1; in adxl345_thread_cb() local
28 if (adxl345_get_status(dev, &status1, NULL) < 0) { in adxl345_thread_cb()
33 ADXL345_STATUS_DATA_RDY(status1)) { in adxl345_thread_cb()
93 uint8_t int_mask, int_en, status1; in adxl345_trigger_set() local
124 ret = adxl345_get_status(dev, &status1, NULL); in adxl345_trigger_set()
Dadxl345_stream.c159 hdr->int_status = data->status1; in adxl345_process_fifo_samples_cb()
241 uint8_t status1 = data->status1; in adxl345_process_status1_cb() local
271 && FIELD_GET(ADXL345_INT_MAP_WATERMARK_MSK, status1)) { in adxl345_process_status1_cb()
325 rx_data->int_status = status1; in adxl345_process_status1_cb()
373 rtio_sqe_prep_read(read_status_reg, data->iodev, RTIO_PRIO_NORM, &data->status1, 1, NULL); in adxl345_stream_irq_handler()
Dadxl345.c129 uint8_t *status1, in adxl345_get_status() argument
137 *status1 = buf[0]; in adxl345_get_status()
283 uint8_t axis_data[6], status1; in adxl345_read_sample() local
287 adxl345_get_status(dev, &status1, NULL); in adxl345_read_sample()
288 } while (!(ADXL345_STATUS_DATA_RDY(status1))); in adxl345_read_sample()
Dadxl345.h180 uint8_t status1; member
/Zephyr-latest/drivers/sensor/adi/adxl372/
Dadxl372_trigger.c24 uint8_t status1, status2; in adxl372_thread_cb() local
28 if (adxl372_get_status(dev, &status1, &status2, NULL) < 0) { in adxl372_thread_cb()
47 ADXL372_STATUS_1_DATA_RDY(status1)) { in adxl372_thread_cb()
108 uint8_t int_mask, int_en, status1, status2; in adxl372_trigger_set() local
145 ret = adxl372_get_status(dev, &status1, &status2, NULL); /* Clear status */ in adxl372_trigger_set()
Dadxl372_stream.c215 hdr->int_status = data->status1; in adxl372_process_fifo_samples_cb()
301 uint8_t status1 = data->status1; in adxl372_process_status1_cb() local
337 FIELD_GET(ADXL372_INT1_MAP_FIFO_FULL_MSK, status1)) { in adxl372_process_status1_cb()
394 rx_data->int_status = status1; in adxl372_process_status1_cb()
441 rtio_sqe_prep_read(read_status_reg, data->iodev, RTIO_PRIO_NORM, &data->status1, 1, NULL); in adxl372_stream_irq_handler()
Dadxl372.c383 * @param status1 - Data stored in the STATUS1 register
390 uint8_t *status1, in adxl372_get_status() argument
406 /* Registers STATUS1, STATUS2, FIFO_ENTRIES2 and FIFO_ENTRIES1 in adxl372_get_status()
417 *status1 = buf[0]; in adxl372_get_status()
526 uint8_t status1; in adxl372_get_accel_data() local
531 adxl372_get_status(dev, &status1, NULL, NULL); in adxl372_get_accel_data()
532 } while (!(ADXL372_STATUS_1_DATA_RDY(status1))); in adxl372_get_accel_data()
Dadxl372.h336 uint8_t status1; member
404 uint8_t *status1, uint8_t *status2, uint16_t *fifo_entries);
/Zephyr-latest/tests/net/lib/dns_resolve/src/
Dmain.c586 int status1; member
597 if (status != expected->status1 && status != expected->status2) { in dns_result_cb()
599 DBG("Expected status1 %d\n", expected->status1); in dns_result_cb()
612 .status1 = DNS_EAI_INPROGRESS, in ZTEST()
641 .status1 = DNS_EAI_INPROGRESS, in ZTEST()
668 int status1; member
679 if (status != expected->status1 && status != expected->status2) { in dns_result_numeric_cb()
681 DBG("Expected status1 %d\n", expected->status1); in dns_result_numeric_cb()
712 .status1 = DNS_EAI_INPROGRESS, in ZTEST()
740 .status1 = DNS_EAI_INPROGRESS, in ZTEST()
/Zephyr-latest/dts/bindings/wifi/
Dnordic,nrf70-coex.yaml28 GPIO of the SOC controlling the Priority (STATUS1) pin (in 4-wire
/Zephyr-latest/drivers/ethernet/
Deth_adin2111.c656 uint32_t status1; in adin2111_offload_thread() local
681 ret = eth_adin2111_reg_read(dev, ADIN2111_STATUS1, &status1); in adin2111_offload_thread()
692 if (is_adin2111 && (status1 & ADIN2111_STATUS1_PHYINT)) { in adin2111_offload_thread()
697 if (status1 & ADIN2111_STATUS1_P1_RX_RDY) { in adin2111_offload_thread()
703 if (is_adin2111 && (status1 & ADIN2111_STATUS1_P2_RX_RDY)) { in adin2111_offload_thread()
717 if (status1 & ADIN2111_STATUS1_P1_RX_RDY) { in adin2111_offload_thread()
725 &status1); in adin2111_offload_thread()
729 } while (!!(status1 & ADIN2111_STATUS1_P1_RX_RDY)); in adin2111_offload_thread()
733 if (is_adin2111 && (status1 & ADIN2111_STATUS1_P2_RX_RDY)) { in adin2111_offload_thread()
741 &status1); in adin2111_offload_thread()
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/Zephyr-latest/drivers/peci/
Dpeci_mchp_xec.c290 while (!(regs->STATUS1 & MCHP_PECI_STS1_EOF)) { in peci_xec_write()
404 if (regs->STATUS1 & MCHP_PECI_STS1_EOF) { in peci_xec_transfer()
405 regs->STATUS1 |= MCHP_PECI_STS1_EOF; in peci_xec_transfer()
424 LOG_DBG("PECI sts1 %x", regs->STATUS1); in peci_xec_transfer()
/Zephyr-latest/soc/microchip/mec/common/reg/
Dmec_peci.h124 volatile uint8_t STATUS1; member
/Zephyr-latest/samples/drivers/espi/src/
Dmain.c190 * Check STATUS1 BUSY, not expected to be set for volatile status write.
339 /* read 2 bytes both will be STATUS1 */ in spi_saf_init()
349 LOG_ERR("Read SPI STATUS1 spi_transceive" in spi_saf_init()
358 " STATUS1=0x%02X", in spi_saf_init()
/Zephyr-latest/samples/boards/microchip/mec172xevb_assy6906/qmspi_ldma/src/
Dmain.c481 printf("Read SPI flash Status1 error: %d\n", err); in main()
485 printf("SPI Flash Status1 = 0x%02x\n", spi_status1); in main()
/Zephyr-latest/tests/boards/mec172xevb_assy6906/qspi/src/
Dmain.c544 /* poll busy bit in flash status1 register */ in test_spi_quad_write()
548 zassert_true(ret == 0, "Read flash STATUS1 register error %d", ret); in test_spi_quad_write()
/Zephyr-latest/soc/microchip/mec/mec15xx/
Dsoc_espi_saf_v1.h120 * op3 = SPI flash read STATUS1 opcode
/Zephyr-latest/drivers/input/
Dinput_pinnacle.c70 /* Status1 definition */
778 LOG_ERR("Failed to clear SW_CC in Status1"); in pinnacle_init()
/Zephyr-latest/drivers/espi/
Despi_saf_mchp_xec.c42 * Flash STATUS1 poll timeout in 32KHz periods
46 * Add delay between Poll STATUS1 commands in 20 ns units.
Despi_saf_mchp_xec_v2.c59 * Flash STATUS1 poll timeout in 32KHz periods
63 * Add delay between Poll STATUS1 commands in 20 ns units.
/Zephyr-latest/soc/microchip/mec/mec172x/
Dsoc_espi_saf_v2.h144 * op3 = SPI flash read STATUS1 opcode
/Zephyr-latest/drivers/sensor/bosch/bmi08x/
Dbmi08x.h56 /* Accel Interrupt status1 register */