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/Zephyr-latest/include/zephyr/app_memory/
Dmem_domain.h3 * Copyright (c) 2018-2020 Intel Corporation
5 * SPDX-License-Identifier: Apache-2.0
22 * @defgroup mem_domain_apis Memory domain APIs
31 * @brief Statically declare a memory partition
45 * @brief Memory Partition
47 * A memory partition is a region of memory in the linear address space
52 * underlying memory management hardware; arbitrary values are unlikely
53 * to work.
56 /** start address of memory partition */
58 /** size of memory partition */
[all …]
/Zephyr-latest/include/zephyr/sys/
Dmem_blocks.h4 * SPDX-License-Identifier: Apache-2.0
10 * @brief Memory Blocks Allocator
31 * @defgroup mem_blocks_apis Memory Blocks APIs
37 * @brief Memory Blocks Allocator
42 * @brief Multi Memory Blocks Allocator
49 * @brief Memory Blocks Allocator
56 * @brief Multi Memory Blocks Allocator
61 * @brief Multi memory blocks allocator choice function
63 * This is a user-provided functions whose responsibility is selecting
64 * a specific memory blocks allocator based on the opaque cfg value,
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/Zephyr-latest/include/zephyr/drivers/mm/
Dmm_drv_bank.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Memory Banks Driver APIs
11 * This contains generic APIs to be used by a system-wide memory management
12 * driver to track page usage within memory banks.
14 * @note The caller of these functions needs to ensure proper locking
15 * to protect the data when using these APIs.
26 * @brief Memory Banks Driver APIs
27 * @defgroup mm_drv_bank_apis Memory Banks Driver APIs
29 * This contains APIs for a system-wide memory management driver to
30 * track page usage within memory banks.
[all …]
Dsystem_mm.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Memory Management Driver APIs
11 * This contains APIs for a system-wide memory management
27 * @brief Memory Management Driver APIs
28 * @defgroup mm_drv_apis Memory Management Driver APIs
30 * This contains APIs for a system-wide memory management
48 /** Write-through caching */
51 /** Full write-back caching */
55 #define SYS_MM_MEM_CACHE_MASK (BIT(3) - 1)
64 * Default should be read-only, no user, no exec.
[all …]
/Zephyr-latest/doc/services/mem_mgmt/
Dindex.rst3 Memory Attributes
6 It is possible in the devicetree to mark the memory regions with attributes by
7 using the ``zephyr,memory-attr`` property. This property and the related memory
8 region can then be retrieved at run-time by leveraging a provided helper
12 and explained in :zephyr_file:`include/zephyr/dt-bindings/memory-attr/memory-attr.h`.
14 For example, to mark a memory region in the devicetree as non-volatile, cacheable,
15 out-of-order:
17 .. code-block:: devicetree
19 mem: memory@10000000 {
20 compatible = "mmio-sram";
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/Zephyr-latest/doc/kernel/usermode/
Dmemory_domain.rst3 Memory Protection Design
6 Zephyr's memory protection design is geared towards microcontrollers with MPU
7 (Memory Protection Unit) hardware. We do support some architectures, such as x86,
8 which have a paged MMU (Memory Management Unit), but in that case the MMU is
12 can be considered to have an MPU with an unlimited number of programmable
15 There are a few different levels on how memory access is configured when
16 Zephyr memory protection features are enabled, which we will describe here:
18 Boot Time Memory Configuration
24 - Any configuration of memory regions which need to have special caching or
25 write-back policies for basic hardware and driver function. Note that most
[all …]
/Zephyr-latest/doc/kernel/memory_management/
Dslabs.rst3 Memory Slabs
6 A :dfn:`memory slab` is a kernel object that allows memory blocks
7 to be dynamically allocated from a designated memory region.
8 All memory blocks in a memory slab have a single fixed size,
9 allowing them to be allocated and released efficiently
10 and avoiding memory fragmentation concerns.
19 Any number of memory slabs can be defined (limited only by available RAM). Each
20 memory slab is referenced by its memory address.
22 A memory slab has the following key properties:
30 * A **buffer** that provides the memory for the memory slab's blocks.
[all …]
Dsys_mem_blocks.rst3 Memory Blocks Allocator
6 The Memory Blocks Allocator allows memory blocks to be dynamically
7 allocated from a designated memory region, where:
9 * All memory blocks have a single fixed size.
14 This is useful for operations such as scatter-gather DMA transfers.
17 buffer (unlike memory slab). This allows the buffer to reside in
18 memory regions where these can be powered down to conserve energy.
27 Any number of Memory Blocks Allocator can be defined (limited only by
28 available RAM). Each allocator is referenced by its memory address.
30 A memory blocks allocator has the following key properties:
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Dvirtual_memory.rst3 Virtual Memory
6 Virtual memory (VM) in Zephyr provides developers with the ability to fine tune
7 access to memory. To utilize virtual memory, the platform must support
8 Memory Management Unit (MMU) and it must be enabled in the build. Due to
9 the target of Zephyr mainly being embedded systems, virtual memory
14 Default is to do 1:1 mapping for the kernel image (including code and data)
15 between physical and virtual memory address spaces, if demand paging
20 Basic virtual memory support does not utilize secondary storage to
21 extend usable memory. The maximum usable memory is the same as
22 the physical memory.
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Dheap.rst3 Memory Heaps
6 Zephyr provides a collection of utilities that allow threads to
7 dynamically allocate memory.
15 The simplest way to define a heap is statically, with the
17 with a given name that manages a memory region of the
20 Heaps can also be created to manage arbitrary regions of
21 application-controlled memory using :c:func:`k_heap_init`.
23 Allocating Memory
26 Memory can be allocated from a heap using :c:func:`k_heap_alloc`,
28 desired. This functions similarly to standard C ``malloc()``,
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Dshared_multi_heap.rst6 The shared multi-heap memory pool manager uses the multi-heap allocator to
7 manage a set of reserved memory regions with different capabilities /
8 attributes (cacheable, non-cacheable, etc...).
10 All the different regions can be added at run-time to the shared multi-heap
12 be used by drivers or applications to request memory with certain capabilities.
16 1. At boot time some platform code initialize the shared multi-heap framework
17 using :c:func:`shared_multi_heap_pool_init()` and add the memory regions to
21 2. Each memory region encoded in a :c:struct:`shared_multi_heap_region`
22 structure. This structure is also carrying an opaque and user-defined
23 integer value that is used to define the region capabilities (for example:
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/Zephyr-latest/include/zephyr/drivers/misc/ft8xx/
Dft8xx_common.h4 * SPDX-License-Identifier: Apache-2.0
22 * @brief FT8xx functions to write and read memory
29 * @brief Write 1 byte (8 bits) to FT8xx memory
31 * @param address Memory address to write to
32 * @param data Byte to write
37 * @brief Write 2 bytes (16 bits) to FT8xx memory
39 * @param address Memory address to write to
40 * @param data Value to write
45 * @brief Write 4 bytes (32 bits) to FT8xx memory
47 * @param address Memory address to write to
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/Zephyr-latest/include/zephyr/multi_heap/
Dshared_multi_heap.h4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Public API for Shared Multi-Heap framework
28 * @brief Shared Multi-Heap (SMH) interface
29 * @defgroup shared_multi_heap Shared multi-heap interface
33 * The shared multi-heap manager uses the multi-heap allocator to manage a set
34 * of memory regions with different capabilities / attributes (cacheable,
35 * non-cacheable, etc...).
37 * All the different regions can be added at run-time to the shared multi-heap
39 * can be used by drivers or applications to request memory with certain
44 * - At boot time some platform code initialize the shared multi-heap
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/Zephyr-latest/include/zephyr/mem_mgmt/
Dmem_attr_heap.h4 * SPDX-License-Identifier: Apache-2.0
11 * @brief Memory heaps based on memory attributes
12 * @defgroup memory_attr_heap Memory heaps based on memory attributes
24 * @brief Init the memory pool
26 * This must be the first function to be called to initialize the memory pools
27 * from all the memory regions with the a software attribute.
30 * @retval -EALREADY if the pool was already initialized.
31 * @retval -ENOMEM too many regions already allocated.
36 * @brief Allocate memory with a specified attribute and size.
38 * Allocates a block of memory of the specified size in bytes and with a
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Dmem_attr.h4 * SPDX-License-Identifier: Apache-2.0
11 * @brief Memory-Attr Interface
12 * @defgroup memory_attr_interface Memory-Attr Interface
19 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
38 * `zephyr,memory-attr`
41 * with the `zephyr,memory-attr` property. The macro is expanded once for each
45 * @param fn macro to invoke
51 * @brief memory-attr region structure.
53 * This structure represents the data gathered from DT about a memory-region
54 * marked with memory attributes.
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/Zephyr-latest/lib/mem_blocks/
DKconfig3 # SPDX-License-Identifier: Apache-2.0
5 menu "Memory Blocks"
8 bool "(Yet Another) Memory Blocks Allocator"
10 This enables support for memory block allocator where:
11 () All memory blocks have a single fixed size.
14 This is useful for operations such as scatter-gather DMA
17 the associated buffer (unlike memory slab). This allows
18 the buffer to reside in memory regions where these can be
19 powered down to conserve energy.
22 bool "Memory Blocks Allocator event notifications"
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/Zephyr-latest/tests/subsys/mem_mgmt/mem_attr_heap/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-sw.h>
35 zassert_equal(-EALREADY, ret, "Second init should be failing"); in ZTEST()
38 * Allocate 0x100 bytes of cacheable memory. in ZTEST()
41 zassert_not_null(block, "Failed to allocate memory"); in ZTEST()
44 * Check that the just allocated memory was allocated from the correct in ZTEST()
45 * memory region. in ZTEST()
48 zassert_equal(region->dt_addr, ADDR_MEM_CACHE_SW, in ZTEST()
49 "Memory allocated from the wrong region"); in ZTEST()
52 * Allocate 0x100 bytes of non-cacheable memory. in ZTEST()
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/Zephyr-latest/arch/arm/core/mpu/
Darm_core_mpu_dev.h4 * SPDX-License-Identifier: Apache-2.0
22 * @brief Maximum number of memory domain partitions
24 * This internal macro returns the maximum number of memory partitions, which
25 * may be defined in a memory domain, given the amount of available HW MPU
34 * on top of the statically configured memory regions, the maximum number of
35 * memory domain partitions is set to half of the number of available MPU
36 * regions. This ensures that in the worst-case where there are gaps between
37 * the memory partitions of the domain, the desired memory map can still be
45 * on top of the statically configured memory regions, the maximum number
46 * of memory domain partitions is equal to the number of available MPU regions.
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DKconfig1 # Memory Protection Unit (MPU) configuration options
4 # SPDX-License-Identifier: Apache-2.0
20 MCU implements Memory Protection Unit.
23 The ARMv6-M and ARMv7-M MPU architecture requires a power-of-two
26 The NXP MPU as well as the ARMv8-M MPU do not require MPU regions
27 to have power-of-two alignment for base address and region size.
29 The ARMv8-M MPU requires the active MPU regions be non-overlapping.
30 As a result of this, the ARMv8-M MPU needs to fully partition the
31 memory map when programming dynamic memory regions (e.g. PRIV stack
32 guard, user thread stack, and application memory domains), if the
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/Zephyr-latest/kernel/
DKconfig.mem_domain3 # Copyright (c) 2014-2015 Wind River Systems, Inc.
4 # SPDX-License-Identifier: Apache-2.0
6 menu "Memory Domains"
9 int "Maximum number of partitions per memory domain"
14 Configure the maximum number of partitions per memory domain.
21 architecture-specific data is needed on a per memory domain basis.
24 must also define the arch_mem_domain_init() function to set this up
25 when a memory domain is created.
27 Typical uses might be a set of page tables for that memory domain.
34 modifying a memory domain's partitions at runtime, or changing
[all …]
/Zephyr-latest/include/zephyr/arch/xtensa/
Dxtensa_mmu.h4 * SPDX-License-Identifier: Apache-2.0
13 * @defgroup xtensa_mmu_apis Xtensa Memory Management Unit (MMU) APIs
19 * @name Memory region permission and caching mode.
23 /** Memory region is executable. */
26 /** Memory region is writable. */
29 /** Memory region is both executable and writable */
32 /** Memory region has write-back cache. */
35 /** Memory region has write-through cache. */
43 * @name Memory domain and partitions
53 /* Read-Write access permission attributes */
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/Zephyr-latest/include/zephyr/debug/
Dgdbstub.h4 * SPDX-License-Identifier: Apache-2.0
10 /* Map from CPU exceptions to GDB */
18 /* Access permissions for memory regions */
29 /** Describe one memory region */
31 /** Start address of a memory region */
34 /** End address of a memory region */
37 /** Memory region attributes */
54 * Memory region descriptions used for GDB memory access.
56 * This array specifies which region of memory GDB can access
57 * with read/write attributes. This is used to restrict
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/Zephyr-latest/subsys/mem_mgmt/
DKconfig2 # SPDX-License-Identifier: Apache-2.0
5 bool "Memory Attributes management library"
8 Enable a small library to manage the memory regions defined in the DT
9 with a `zephyr,memory-attr` property. This library builds at build
10 time an array of the memory regions defined in the DT that can be
11 probed at run-time using several helper functions. Set to `N` if
12 unsure to save RODATA space.
15 bool "Memory Attributes heap allocator"
18 Enable an heap allocator based on memory attributes to dynamically
19 allocate memory from DeviceTree defined memory regions.
/Zephyr-latest/include/zephyr/kernel/
Dmm.h4 * SPDX-License-Identifier: Apache-2.0
19 * @brief Kernel Memory Management
20 * @defgroup kernel_memory_management Kernel Memory Management
36 /** Write-through caching. Used by certain drivers. */
39 /** Full write-back caching. Any RAM mapped wants this. */
44 * pay attention to be not conflicted when updating these flags.
48 #define K_MEM_CACHE_MASK (BIT(3) - 1)
55 * Default is read-only, no user, no exec
60 /** Region will have read/write access (and not read-only) */
66 /** Region will be accessible to user mode (normally supervisor-only) */
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/Zephyr-latest/modules/lvgl/
DKconfig.memory1 # Copyright (c) 2018-2019 Jan Van Winkel <jan.van_winkel@dxplore.eu>
3 # SPDX-License-Identifier: Apache-2.0
5 menu "Memory manager settings"
20 prompt "Memory pool"
23 Memory pool to use for lvgl allocated objects
29 Use C library malloc and free to allocate objects on the C library heap
35 Use a dedicated memory pool from a private sys heap.
40 int "Memory pool size"
44 Size of the memory pool in bytes
47 bool "Link memory pool to custom section"
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