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/Zephyr-latest/soc/nxp/rw/
Dsections.ld15 /* CPU3 <-> CPU1 mailbox */
18 /* CPU3 -> CPU1 TXQ */
21 /* Left space is reserved for CPU3/CPU1 operations */
31 /* Reserve space for CPU1 -> CPU3 TXQ (allocated by the CPU2) */
/Zephyr-latest/tests/lib/cmsis_dsp/matrix/
Dtestcase.yaml29 - mps2/an521/cpu1
58 - mps2/an521/cpu1
87 - mps2/an521/cpu1
115 - mps2/an521/cpu1
144 - mps2/an521/cpu1
173 - mps2/an521/cpu1
203 - mps2/an521/cpu1
234 - mps2/an521/cpu1
265 - mps2/an521/cpu1
294 - mps2/an521/cpu1
[all …]
/Zephyr-latest/soc/nxp/lpc/
Dsoc.yml28 - name: cpu1
46 - lpc55s69/cpu1
62 - lpc55s69/cpu1
/Zephyr-latest/soc/nxp/mcx/
Dsoc.yml9 - name: cpu1
32 - mcxn947/cpu1
54 - mcxn947/cpu1
/Zephyr-latest/boards/nxp/lpcxpresso55s69/
Dlpcxpresso55s69_lpc55s69_cpu1.yaml7 identifier: lpcxpresso55s69/lpc55s69/cpu1
8 name: NXP LPCXpresso55S69 (CPU1)
Dlpcxpresso55s69_lpc55s69_cpu1.dts29 * Default for this board is to allocate SRAM3-4 to cpu1 but the
34 * for cpu1. This would require the zephyr,sram chosen value for cpu1
Dlpcxpresso55s69_lpc55s69_cpu0.dts42 zephyr,code-cpu1-partition = &slot0_ns_partition;
43 zephyr,sram-cpu1-partition = &sram3;
84 * for cpu1. This would require the zephyr,sram chosen value for cpu1
/Zephyr-latest/dts/bindings/clock/
Dst,stm32wb-rcc.yaml16 cpu1-prescaler:
35 CPU1 prescaler. Sets a HCLK1 frequency (Core frequency)
37 The HCLK1 clocks CPU1, AHB1, AHB2, AHB3 and SRAM1.
/Zephyr-latest/soc/st/stm32/common/
Dstm32_hsem.h18 * Index of the semaphore used by CPU2 to prevent the CPU1 to either write or
19 * erase data in flash. The CPU1 shall not either write or erase in flash when
20 * this semaphore is taken by the CPU2. When the CPU1 needs to either write or
25 * timing. The CPU1 may request the CPU2 to use the semaphore instead of the
31 * Index of the semaphore used by CPU1 to prevent the CPU2 to either write or
32 * erase data in flash. In order to protect its timing, the CPU1 may get this
72 /** Index of the semaphore for CPU1 mailbox */
/Zephyr-latest/samples/subsys/ipc/openamp/
DKconfig.sysbuild10 default "lpcxpresso55s69/lpc55s69/cpu1" if $(BOARD) = "lpcxpresso55s69"
11 default "mps2/an521/cpu1" if $(BOARD) = "mps2"
/Zephyr-latest/tests/lib/cmsis_dsp/filtering/
Dtestcase.yaml30 - mps2/an521/cpu1
59 - mps2/an521/cpu1
88 - mps2/an521/cpu1
118 - mps2/an521/cpu1
/Zephyr-latest/boards/nxp/lpcxpresso54114/
Dlpcxpresso54114_lpc54114_m0.dts19 zephyr,code-cpu1-partition = &slot1_partition;
25 &cpu1 {
/Zephyr-latest/boards/arm/mps2/
DCMakeLists.txt7 # Building a firmware image for CPU1: this requires a binary
8 # for CPU0, which will boot the device and wake up CPU1.
Dmps2_an521_cpu1.yaml1 identifier: mps2/an521/cpu1
/Zephyr-latest/samples/drivers/mbox/remote/boards/
Dlpcxpresso55s69_lpc55s69_cpu1.conf5 # For purpose of sample enable UART Console on CPU1
/Zephyr-latest/tests/kernel/smp_boot_delay/src/
Dmain.c46 zassert_false(mp_flag, "CPU1 must not be running yet"); in ZTEST()
53 zassert_true(mp_flag, "CPU1 did not start"); in ZTEST()
73 zassert_true(mp_flag, "CPU1 did not start thread via IPI"); in ZTEST()
/Zephyr-latest/boards/st/stm32mp157c_dk2/support/
Dopenocd.cfg5 stm32mp15x.cpu1 configure -gdb-port disabled
/Zephyr-latest/samples/drivers/ipm/ipm_mcux/
DKconfig.sysbuild10 default "lpcxpresso55s69/lpc55s69/cpu1" if $(BOARD) = "lpcxpresso55s69"
/Zephyr-latest/samples/subsys/ipc/openamp/remote/
Dsample.yaml8 - lpcxpresso55s69/lpc55s69/cpu1
/Zephyr-latest/tests/arch/arm/arm_irq_zero_latency_levels/
Dtestcase.yaml12 - mps2/an521/cpu1
/Zephyr-latest/samples/subsys/ipc/rpmsg_service/
DKconfig.sysbuild9 default "mps2/an521/cpu1" if $(BOARD) = "mps2"
/Zephyr-latest/samples/drivers/ipm/ipm_mcux/remote/
Dsample.yaml9 - lpcxpresso55s69/lpc55s69/cpu1
/Zephyr-latest/samples/drivers/mbox_data/
DKconfig.sysbuild12 default "lpcxpresso55s69/lpc55s69/cpu1" if $(BOARD) = "lpcxpresso55s69"
/Zephyr-latest/tests/drivers/mbox/mbox_data/
DKconfig.sysbuild12 default "lpcxpresso55s69/lpc55s69/cpu1" if $(BOARD) = "lpcxpresso55s69"
/Zephyr-latest/tests/benchmarks/cmsis_dsp/basicmath/
Dtestcase.yaml19 - mps2/an521/cpu1

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