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/Zephyr-latest/boards/shields/st7735r/
Dst7735r_ada_160x128.overlay2 * Copyright (c) 2020, Kim Bøndergaard, <kim@fam-boendergaard.dk>
4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/mipi_dbi/mipi_dbi.h>
15 compatible = "zephyr,mipi-dbi-spi";
16 spi-dev = <&arduino_spi>;
17 dc-gpios = <&arduino_header 15 GPIO_ACTIVE_HIGH>; /* D9 */
18 reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>; /* D8 */
19 #address-cells = <1>;
20 #size-cells = <0>;
24 mipi-max-frequency = <20000000>;
[all …]
/Zephyr-latest/tests/net/icmp/
Dtestcase.yaml4 - net
5 - icmp
9 - CONFIG_NET_OFFLOAD=y
10 - CONFIG_NET_IF_MAX_IPV6_COUNT=2
11 - CONFIG_NET_IF_MAX_IPV4_COUNT=2
14 - CONFIG_NET_SOCKETS_OFFLOAD=y
15 - CONFIG_NET_IF_MAX_IPV6_COUNT=2
16 - CONFIG_NET_IF_MAX_IPV4_COUNT=2
19 - CONFIG_NET_TC_THREAD_COOPERATIVE=y
20 - CONFIG_NET_IF_MAX_IPV6_COUNT=2
[all …]
/Zephyr-latest/dts/arm/infineon/cat3/xmc/
Dxmc4700_F144x2048-intc.dtsi3 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h>
9 port-line-mapping = <
11 XMC4XXX_INTC_SET_LINE_MAP(2, 5, 2, 0) /* ERU0_ETL0_INPUTA_P2_5 XMC_ERU_ETL_INPUT_A2 */
12 XMC4XXX_INTC_SET_LINE_MAP(3, 2, 1, 0) /* ERU0_ETL0_INPUTA_P3_2 XMC_ERU_ETL_INPUT_A1 */
14 XMC4XXX_INTC_SET_LINE_MAP(2, 0, 7, 0) /* ERU0_ETL0_INPUTB_P2_0 XMC_ERU_ETL_INPUT_B3 */
15 XMC4XXX_INTC_SET_LINE_MAP(2, 4, 6, 0) /* ERU0_ETL0_INPUTB_P2_4 XMC_ERU_ETL_INPUT_B2 */
18 XMC4XXX_INTC_SET_LINE_MAP(2, 3, 2, 1) /* ERU0_ETL1_INPUTA_P2_3 XMC_ERU_ETL_INPUT_A2 */
20 XMC4XXX_INTC_SET_LINE_MAP(2, 2, 6, 1) /* ERU0_ETL1_INPUTB_P2_2 XMC_ERU_ETL_INPUT_B2 */
21 XMC4XXX_INTC_SET_LINE_MAP(2, 6, 7, 1) /* ERU0_ETL1_INPUTB_P2_6 XMC_ERU_ETL_INPUT_B3 */
[all …]
Dxmc4500_F100x1024-intc.dtsi3 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h>
9 port-line-mapping = <
11 XMC4XXX_INTC_SET_LINE_MAP(2, 5, 2, 0) /* ERU0_ETL0_INPUTA_P2_5 XMC_ERU_ETL_INPUT_A2 */
12 XMC4XXX_INTC_SET_LINE_MAP(3, 2, 1, 0) /* ERU0_ETL0_INPUTA_P3_2 XMC_ERU_ETL_INPUT_A1 */
14 XMC4XXX_INTC_SET_LINE_MAP(2, 0, 7, 0) /* ERU0_ETL0_INPUTB_P2_0 XMC_ERU_ETL_INPUT_B3 */
15 XMC4XXX_INTC_SET_LINE_MAP(2, 4, 6, 0) /* ERU0_ETL0_INPUTB_P2_4 XMC_ERU_ETL_INPUT_B2 */
18 XMC4XXX_INTC_SET_LINE_MAP(2, 3, 2, 1) /* ERU0_ETL1_INPUTA_P2_3 XMC_ERU_ETL_INPUT_A2 */
20 XMC4XXX_INTC_SET_LINE_MAP(2, 2, 6, 1) /* ERU0_ETL1_INPUTB_P2_2 XMC_ERU_ETL_INPUT_B2 */
21 XMC4XXX_INTC_SET_LINE_MAP(2, 6, 7, 1) /* ERU0_ETL1_INPUTB_P2_6 XMC_ERU_ETL_INPUT_B3 */
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/Zephyr-latest/scripts/dts/python-devicetree/tests/
Dtest.dts4 * SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
16 interrupt-parent-test {
18 compatible = "interrupt-three-cell";
19 #interrupt-cells = <3>;
20 interrupt-controller;
23 interrupts = <1 2 3 4 5 6>;
24 interrupt-names = "foo", "bar";
25 interrupt-parent = <&{/interrupt-parent-test/controller}>;
28 interrupts-extended-test {
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/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc11u6x.dtsi4 * SPDX-License-Identifier: Apache-2.0
6 #include <arm/armv6-m.dtsi>
7 #include <zephyr/dt-bindings/clock/lpc11u6x_clock.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <0>;
17 compatible = "arm,cortex-m0+";
23 compatible = "mmio-sram";
27 compatible = "zephyr,memory-region", "mmio-sram";
29 zephyr,memory-region = "SRAM1";
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/Zephyr-latest/dts/arm/nuvoton/npcx/
Dnpcx-miwus-wui-map.dtsi4 * SPDX-License-Identifier: Apache-2.0
9 npcx-miwus-wui-map {
10 compatible = "nuvoton,npcx-miwu-wui-map";
14 wui_io80: wui0-1-0 {
17 wui_io81: wui0-1-1 {
20 wui_io82: wui0-1-2 {
21 miwus = <&miwu0 0 2>; /* GPIO82 */
23 wui_io83: wui0-1-3 {
26 wui_io87: wui0-1-7 {
31 wui_io90: wui0-2-0 {
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/Zephyr-latest/tests/cmake/zephyr_get/
DCMakeLists.txt1 # SPDX-License-Identifier: Apache-2.0
6 # Script mode initialization (re-run)
24 # - run_suite(<test-1> [<test-2> ...])
47 # - assert_equal(<variable> <expected-value>)
49 # - assert_equal(<variable>
50 # IMAGE <image-1> <expected-value-for-image-1>
51 # [IMAGE <image-2> <expected-value-for-image-2> ...]
141 # Provided -DTESTCASE_VARIABLE=<...> serves as the
142 # LOCAL sysbuild-defined value for this primary image.
144 # Provided -Dzephyr_get_2nd_TESTCASE_VARIABLE=<...> serves as
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/Zephyr-latest/boards/snps/nsim/arc_classic/support/
Dmdb_hs_smp.args1 -arcv2hs
2 -core2
3 -rgf_num_banks=2
4 -rgf_banked_regs=32
5 -rgf_num_wr_ports=2
6 -Xatomic
7 -Xll64
8 -Xunaligned
9 -Xcode_density
10 -Xdiv_rem=radix4
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Dmdb_hs5x_smp.args1 -arcv3hs
2 -core0
3 -Xdual_issue
4 -uarch_rev=0:0
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -lpc_width=0
8 -Xatomic=2
9 -Xll64
10 -Xunaligned
[all …]
Dmdb_hs5x_smp_12cores.args1 -arcv3hs
2 -core0
3 -Xdual_issue
4 -uarch_rev=0:0
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -lpc_width=0
8 -Xatomic=2
9 -Xll64
10 -Xunaligned
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Dmdb_hs6x_smp.args1 -nogoifmain
2 -noprofile
3 -arc64
4 -core0
5 -Xdual_issue
6 -uarch_rev=0:0
7 -rgf_num_banks=1
8 -rgf_num_wr_ports=2
9 -Xm128
10 -Xatomic=2
[all …]
Dmdb_hs6x_smp_12cores.args1 -arc64
2 -core0
3 -Xdual_issue
4 -uarch_rev=0:0
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -Xm128
8 -Xatomic=2
9 -Xunaligned
10 -Xmpy_cycles=3
[all …]
Dmdb_hs_hostlink.args1 -arcv2hs
2 -core2
3 -arcnum=3
4 -rgf_num_banks=2
5 -rgf_banked_regs=32
6 -rgf_num_wr_ports=2
7 -Xatomic
8 -Xll64
9 -Xunaligned
10 -Xcode_density
[all …]
Dmdb_hs.args1 -arcv2hs
2 -core2
3 -arcnum=3
4 -rgf_num_banks=2
5 -rgf_banked_regs=32
6 -rgf_num_wr_ports=2
7 -Xatomic
8 -Xll64
9 -Xunaligned
10 -Xcode_density
[all …]
Dmdb_hs_mpuv6.args1 -arcv2hs
2 -core2
3 -arcnum=3
4 -rgf_num_banks=2
5 -rgf_banked_regs=32
6 -rgf_num_wr_ports=2
7 -Xatomic
8 -Xll64
9 -Xunaligned
10 -Xcode_density
[all …]
Dmdb_em.args1 -arcv2em
2 -core3
3 -rgf_num_banks=2
4 -rgf_banked_regs=32
5 -rgf_num_wr_ports=2
6 -Xcode_density
7 -Xdiv_rem=radix2
8 -turbo_boost
9 -Xswap
10 -Xbitscan
[all …]
/Zephyr-latest/drivers/video/
Dmt9m114.c5 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/drivers/video-controls.h>
83 {0x098E, 2, 0x1000}, /* LOGICAL_ADDRESS_ACCESS */
85 {0xC980, 2, 0x0120}, /* CAM_SYSCTL_PLL_DIVIDER_M_N = 288 */
86 {0xC982, 2, 0x0700}, /* CAM_SYSCTL_PLL_DIVIDER_P = 1792 */
88 {0x316A, 2, 0x8270}, /* Auto txlo_row for hot pixel and linear full well optimization */
89 {0x316C, 2, 0x8270}, /* Auto txlo for hot pixel and linear full well optimization */
90 {0x3ED0, 2, 0x2305}, /* Eclipse setting, ecl range=1, ecl value=2, ivln=3 */
91 {0x3ED2, 2, 0x77CF}, /* TX_hi = 12 */
92 {0x316E, 2, 0x8202}, /* Auto ecl , threshold 2x, ecl=0 at high gain, ecl=2 for low gain */
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/Zephyr-latest/subsys/net/ip/
Dnet_tc_mapping.h10 * SPDX-License-Identifier: Apache-2.0
19 * according to 802.1Q - table I-2.
24 * 2 EE Excellent effort
39 * implementations that do not support the credit-based shaper transmission
41 * Ref: 802.1Q - chapter 8.6.6 - table 8-4
47 #if NET_TC_TX_COUNT == 2 || NET_TC_RX_COUNT == 2
51 static const uint8_t priority2tc_strict_3[] = {0, 0, 0, 0, 1, 1, 2, 2};
54 static const uint8_t priority2tc_strict_4[] = {0, 0, 1, 1, 2, 2, 3, 3};
57 static const uint8_t priority2tc_strict_5[] = {0, 0, 1, 1, 2, 2, 3, 4};
60 static const uint8_t priority2tc_strict_6[] = {1, 0, 2, 2, 3, 3, 4, 5};
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/Zephyr-latest/dts/arm/nordic/
Dnrf54h20_cpurad.dtsi4 * SPDX-License-Identifier: Apache-2.0
18 /delete-node/ &cpuapp;
19 /delete-node/ &cpuapp_peripherals;
20 /delete-node/ &cpuapp_ppb;
21 /delete-node/ &cpuapp_ram0;
22 /delete-node/ &cpuppr;
23 /delete-node/ &cpuflpr;
27 compatible = "simple-bus";
28 interrupt-parent = <&cpurad_nvic>;
39 compatible = "simple-bus";
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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dch32v003-pinctrl.h4 * SPDX-License-Identifier: Apache-2.0
12 #define CH32V003_PINMUX_PORT_PD 2
21 #define CH32V003_PINMUX_USART1_RM 2
27 /* Port number with 0-2 */
29 /* Pin number 0-15 */
30 #define CH32V003_PINCTRL_PIN_SHIFT 2
31 /* Base remap bit 0-31 */
33 /* Function remapping ID 0-3 */
44 #define TIM1_ETR_PD4_2 CH32V003_PINMUX_DEFINE(PD, 4, TIM1, 2)
45 #define TIM1_ETR_PC2_3 CH32V003_PINMUX_DEFINE(PC, 2, TIM1, 3)
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/Zephyr-latest/tests/bsim/bluetooth/ll/edtt/gatt_test_app/src/gatt/
Dservice_a_1.c4 * SPDX-License-Identifier: Apache-2.0
9 * This code is auto-generated from the Excel Workbook
43 '1', '1', '1', '1', '1', '2', '2', '2', '2', '2', '3', '3', '3',
47 '1', '1', '1', '2', '2', '2', '2', '2', '3', '3', '3', '3', '3',
51 '1', '2', '2', '2', '2', '2', '3', '3', '3', '3', '3', '4', '4',
54 '9', '9', '0', '0', '0', '0', '0', '1', '1', '1', '1', '1', '2',
55 '2', '2', '2', '2', '3', '3', '3', '3', '3', '4', '4', '4', '4',
58 '0', '0', '0', '0', '0', '1', '1', '1', '1', '1', '2', '2', '2',
59 '2', '2', '3', '3', '3', '3', '3', '4', '4', '4', '4', '4', '5',
62 '0', '0', '0', '1', '1', '1', '1', '1', '2', '2', '2', '2', '2',
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/Zephyr-latest/samples/subsys/usb/hid-mouse/
DREADME.rst1 .. zephyr:code-sample:: usb-hid-mouse
3 :relevant-api: _usb_device_core_api usb_hid_device_api input_interface
13 the number of buttons on the board) a right mouse button, X-axis movement,
14 and Y-axis movement.
17 This sample can be found under :zephyr_file:`samples/subsys/usb/hid-mouse` in the
24 There must be a :dtcompatible:`gpio-keys` group of buttons or keys defined at
30 - ``INPUT_KEY_0``: left button
31 - ``INPUT_KEY_1``: right button
32 - ``INPUT_KEY_2``: move the mouse along the x-axis
33 - ``INPUT_KEY_3``: move the mouse along the y-axis
[all …]
/Zephyr-latest/drivers/ps2/
Dps2_npcx_controller.h4 * SPDX-License-Identifier: Apache-2.0
17 * @brief Write @p value to a PS/2 device via the PS/2 controller.
19 * @param dev Pointer to the device structure for PS/2 controller instance.
20 * @param channel_id Channel ID of the PS/2 to write data.
21 * @param value the data write to the PS/2 device.
24 * @retval -EINVAL Channel ID is invalid.
25 * @retval -ETIMEDOUT Timeout occurred for a PS/2 write transaction.
31 * @brief Set the PS/2 controller to turn on/off the PS/2 channel.
33 * @param dev Pointer to the device structure for PS/2 controller instance.
34 * @param channel_id Channel ID of the PS/2 to enable or disable.
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/Zephyr-latest/cmake/sca/eclair/ECL/
Danalysis_STU.ecl9 -eval_file=zephyr_common_config.ecl
11 -doc_begin="Selection of guidelines from
13 -enable=MC3R1.D4.13
14 -enable=MC3R1.D4.2
15 -enable=MC3R1.D4.4
16 -enable=MC3R1.D4.5
17 -enable=MC3R1.D4.8
18 -enable=MC3R1.D4.11
19 -enable=MC3R1.D4.12
20 -enable=MC3R1.D4.14
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