Lines Matching +full:2 +full:-
5 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/drivers/video-controls.h>
83 {0x098E, 2, 0x1000}, /* LOGICAL_ADDRESS_ACCESS */
85 {0xC980, 2, 0x0120}, /* CAM_SYSCTL_PLL_DIVIDER_M_N = 288 */
86 {0xC982, 2, 0x0700}, /* CAM_SYSCTL_PLL_DIVIDER_P = 1792 */
88 {0x316A, 2, 0x8270}, /* Auto txlo_row for hot pixel and linear full well optimization */
89 {0x316C, 2, 0x8270}, /* Auto txlo for hot pixel and linear full well optimization */
90 {0x3ED0, 2, 0x2305}, /* Eclipse setting, ecl range=1, ecl value=2, ivln=3 */
91 {0x3ED2, 2, 0x77CF}, /* TX_hi = 12 */
92 {0x316E, 2, 0x8202}, /* Auto ecl , threshold 2x, ecl=0 at high gain, ecl=2 for low gain */
93 {0x3180, 2, 0x87FF}, /* Enable delta dark */
94 {0x30D4, 2, 0x6080}, /* Disable column correction due to AE oscillation problem */
95 {0xA802, 2, 0x0008}, /* RESERVED_AE_TRACK_02 */
96 {0x3E14, 2, 0xFF39}, /* Enabling pixout clamping to VAA to solve column band issue */
97 {0xC80C, 2, 0x0001}, /* CAM_SENSOR_CFG_ROW_SPEED */
98 {0xC80E, 2, 0x00DB}, /* CAM_SENSOR_CFG_FINE_INTEG_TIME_MIN = 219 */
99 {0xC810, 2, 0x07C2}, /* CAM_SENSOR_CFG_FINE_INTEG_TIME_MAX = 1986 */
100 {0xC812, 2, 0x02FE}, /* CAM_SENSOR_CFG_FRAME_LENGTH_LINES = 766 */
101 {0xC814, 2, 0x0845}, /* CAM_SENSOR_CFG_LINE_LENGTH_PCK = 2117 */
102 {0xC816, 2, 0x0060}, /* CAM_SENSOR_CFG_FINE_CORRECTION = 96 */
103 {0xC826, 2, 0x0020}, /* CAM_SENSOR_CFG_REG_0_DATA = 32 */
104 {0xC834, 2, 0x0000}, /* CAM_SENSOR_CONTROL_READ_MODE */
105 {0xC854, 2, 0x0000}, /* CAM_CROP_WINDOW_XOFFSET */
106 {0xC856, 2, 0x0000}, /* CAM_CROP_WINDOW_YOFFSET */
109 {0xC88C, 2, 0x1D9A}, /* CAM_AET_MAX_FRAME_RATE = 7578 */
110 {0xC88E, 2, 0x1D9A}, /* CAM_AET_MIN_FRAME_RATE = 7578 */
111 {0xC914, 2, 0x0000}, /* CAM_STAT_AWB_CLIP_WINDOW_XSTART */
112 {0xC916, 2, 0x0000}, /* CAM_STAT_AWB_CLIP_WINDOW_YSTART */
113 {0xC91C, 2, 0x0000}, /* CAM_STAT_AE_INITIAL_WINDOW_XSTART */
114 {0xC91E, 2, 0x0000}, /* CAM_STAT_AE_INITIAL_WINDOW_YSTART */
115 {0x001E, 2, 0x0777}, /* REG_PAD_SLEW */
116 {0xC86E, 2, 0x0038}, /* CAM_OUTPUT_FORMAT_YUV_CLIP for CSI */
117 {0xC984, 2, 0x8000}, /* CAM_PORT_OUTPUT_CONTROL, for MIPI CSI-2 interface : 0x8000 */
121 {MT9M114_CAM_SENSOR_CFG_Y_ADDR_START, 2, 0x00D4}, /* 212 */
122 {MT9M114_CAM_SENSOR_CFG_X_ADDR_START, 2, 0x00A4}, /* 164 */
123 {MT9M114_CAM_SENSOR_CFG_Y_ADDR_END, 2, 0x02FB}, /* 763 */
124 {MT9M114_CAM_SENSOR_CFG_X_ADDR_END, 2, 0x046B}, /* 1131 */
125 {MT9M114_CAM_SENSOR_CFG_CPIPE_LAST_ROW, 2, 0x0223}, /* 547 */
126 {MT9M114_CAM_CROP_WINDOW_WIDTH, 2, 0x03C0}, /* 960 */
127 {MT9M114_CAM_CROP_WINDOW_HEIGHT, 2, 0x0220}, /* 544 */
128 {MT9M114_CAM_OUTPUT_WIDTH, 2, 0x01E0}, /* 480 */
129 {MT9M114_CAM_OUTPUT_HEIGHT, 2, 0x0110}, /* 272 */
130 {MT9M114_CAM_STAT_AWB_CLIP_WINDOW_XEND, 2, 0x01DF}, /* 479 */
131 {MT9M114_CAM_STAT_AWB_CLIP_WINDOW_YEND, 2, 0x010F}, /* 271 */
132 {MT9M114_CAM_STAT_AE_INITIAL_WINDOW_XEND, 2, 0x005F}, /* 95 */
133 {MT9M114_CAM_STAT_AE_INITIAL_WINDOW_YEND, 2, 0x0035}, /* 53 */
137 {MT9M114_CAM_SENSOR_CFG_Y_ADDR_START, 2, 0x0000}, /* 0 */
138 {MT9M114_CAM_SENSOR_CFG_X_ADDR_START, 2, 0x0000}, /* 0 */
139 {MT9M114_CAM_SENSOR_CFG_Y_ADDR_END, 2, 0x03CD}, /* 973 */
140 {MT9M114_CAM_SENSOR_CFG_X_ADDR_END, 2, 0x050D}, /* 1293 */
141 {MT9M114_CAM_SENSOR_CFG_CPIPE_LAST_ROW, 2, 0x01E3}, /* 483 */
142 {MT9M114_CAM_CROP_WINDOW_WIDTH, 2, 0x0280}, /* 640 */
143 {MT9M114_CAM_CROP_WINDOW_HEIGHT, 2, 0x01E0}, /* 480 */
144 {MT9M114_CAM_OUTPUT_WIDTH, 2, 0x0280}, /* 640 */
145 {MT9M114_CAM_OUTPUT_HEIGHT, 2, 0x01E0}, /* 480 */
146 {MT9M114_CAM_STAT_AWB_CLIP_WINDOW_XEND, 2, 0x027F}, /* 639 */
147 {MT9M114_CAM_STAT_AWB_CLIP_WINDOW_YEND, 2, 0x01DF}, /* 479 */
148 {MT9M114_CAM_STAT_AE_INITIAL_WINDOW_XEND, 2, 0x007F}, /* 127 */
149 {MT9M114_CAM_STAT_AE_INITIAL_WINDOW_YEND, 2, 0x005F}, /* 95 */
153 {MT9M114_CAM_SENSOR_CFG_Y_ADDR_START, 2, 0x007C}, /* 124 */
154 {MT9M114_CAM_SENSOR_CFG_X_ADDR_START, 2, 0x0004}, /* 4 */
155 {MT9M114_CAM_SENSOR_CFG_Y_ADDR_END, 2, 0x0353}, /* 851 */
156 {MT9M114_CAM_SENSOR_CFG_X_ADDR_END, 2, 0x050B}, /* 1291 */
157 {MT9M114_CAM_SENSOR_CFG_CPIPE_LAST_ROW, 2, 0x02D3}, /* 723 */
158 {MT9M114_CAM_CROP_WINDOW_WIDTH, 2, 0x0500}, /* 1280 */
159 {MT9M114_CAM_CROP_WINDOW_HEIGHT, 2, 0x02D0}, /* 720 */
160 {MT9M114_CAM_OUTPUT_WIDTH, 2, 0x0500}, /* 1280 */
161 {MT9M114_CAM_OUTPUT_HEIGHT, 2, 0x02D0}, /* 720 */
162 {MT9M114_CAM_STAT_AWB_CLIP_WINDOW_XEND, 2, 0x04FF}, /* 1279 */
163 {MT9M114_CAM_STAT_AWB_CLIP_WINDOW_YEND, 2, 0x02CF}, /* 719 */
164 {MT9M114_CAM_STAT_AE_INITIAL_WINDOW_XEND, 2, 0x00FF}, /* 255 */
165 {MT9M114_CAM_STAT_AE_INITIAL_WINDOW_YEND, 2, 0x008F}, /* 143 */
192 uint8_t addr_buffer[2]; in i2c_burst_read16_dt()
202 uint8_t addr_buffer[2]; in i2c_burst_write16_dt()
203 struct i2c_msg msg[2]; in i2c_burst_write16_dt()
208 msg[0].len = 2U; in i2c_burst_write16_dt()
215 return i2c_transfer_dt(spec, msg, 2); in i2c_burst_write16_dt()
221 const struct mt9m114_config *cfg = dev->config; in mt9m114_write_reg()
224 case 2: in mt9m114_write_reg()
233 return -ENOTSUP; in mt9m114_write_reg()
236 return i2c_burst_write16_dt(&cfg->i2c, reg_addr, value, reg_size); in mt9m114_write_reg()
242 const struct mt9m114_config *cfg = dev->config; in mt9m114_read_reg()
246 return -ENOTSUP; in mt9m114_read_reg()
249 err = i2c_burst_read16_dt(&cfg->i2c, reg_addr, value, reg_size); in mt9m114_read_reg()
255 case 2: in mt9m114_read_reg()
264 return -ENOTSUP; in mt9m114_read_reg()
307 int ret = mt9m114_modify_reg(dev, MT9M114_RST_AND_MISC_CONTROL, 2, 0x01, 0x01); in mt9m114_software_reset()
315 ret = mt9m114_modify_reg(dev, MT9M114_RST_AND_MISC_CONTROL, 2, 0x01, 0x00); in mt9m114_software_reset()
335 err = mt9m114_read_reg(dev, MT9M114_COMMAND_REGISTER, 2, &val); in mt9m114_set_state()
349 mt9m114_write_reg(dev, MT9M114_COMMAND_REGISTER, 2, &val); in mt9m114_set_state()
353 err = mt9m114_read_reg(dev, MT9M114_COMMAND_REGISTER, 2, &val); in mt9m114_set_state()
366 err = mt9m114_read_reg(dev, MT9M114_COMMAND_REGISTER, 2, &val); in mt9m114_set_state()
368 return -EIO; in mt9m114_set_state()
394 struct mt9m114_data *drv_data = dev->data; in mt9m114_set_fmt()
399 if (fmt->pixelformat == fmts[i].pixelformat && fmt->width >= fmts[i].width_min && in mt9m114_set_fmt()
400 fmt->width <= fmts[i].width_max && fmt->height >= fmts[i].height_min && in mt9m114_set_fmt()
401 fmt->height <= fmts[i].height_max) { in mt9m114_set_fmt()
407 if (i == (ARRAY_SIZE(fmts) - 1)) { in mt9m114_set_fmt()
409 return -ENOTSUP; in mt9m114_set_fmt()
412 if (!memcmp(&drv_data->fmt, fmt, sizeof(drv_data->fmt))) { in mt9m114_set_fmt()
417 drv_data->fmt = *fmt; in mt9m114_set_fmt()
420 ret = mt9m114_set_output_format(dev, fmt->pixelformat); in mt9m114_set_fmt()
428 if (fmt->width == resolutionConfigs[i].width && in mt9m114_set_fmt()
429 fmt->height == resolutionConfigs[i].height) { in mt9m114_set_fmt()
447 struct mt9m114_data *drv_data = dev->data; in mt9m114_get_fmt()
449 *fmt = drv_data->fmt; in mt9m114_get_fmt()
467 caps->format_caps = fmts; in mt9m114_get_caps()
477 ret = mt9m114_modify_reg(dev, MT9M114_CAM_SENSOR_CTRL_READ_MODE, 2, in mt9m114_set_ctrl()
482 ret = mt9m114_modify_reg(dev, MT9M114_CAM_SENSOR_CTRL_READ_MODE, 2, in mt9m114_set_ctrl()
487 return -ENOTSUP; in mt9m114_set_ctrl()
519 return -ENODEV; in mt9m114_init()
524 return -ENODEV; in mt9m114_init()
541 fmt.pitch = fmt.width * 2; in mt9m114_init()
546 return -EIO; in mt9m114_init()
565 const struct mt9m114_config *cfg = dev->config; in mt9m114_init_0()
567 if (!device_is_ready(cfg->i2c.bus)) { in mt9m114_init_0()
569 return -ENODEV; in mt9m114_init_0()