Lines Matching +full:2 +full:-
4 * SPDX-License-Identifier: Apache-2.0
6 #include <arm/armv6-m.dtsi>
7 #include <zephyr/dt-bindings/clock/lpc11u6x_clock.h>
8 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <0>;
17 compatible = "arm,cortex-m0+";
23 compatible = "mmio-sram";
27 compatible = "zephyr,memory-region", "mmio-sram";
29 zephyr,memory-region = "SRAM1";
33 compatible = "zephyr,memory-region", "mmio-sram";
35 zephyr,memory-region = "SRAM2";
40 compatible = "soc-nv-flash";
43 /* On-chip EEPROM. */
45 compatible = "nxp,lpc11u6x-eeprom";
50 size = <(DT_SIZE_K(4) - 64)>;
55 compatible = "nxp,lpc-iocon";
57 #address-cells = <1>;
58 #size-cells = <1>;
61 compatible = "nxp,lpc11u6x-pinctrl";
65 compatible = "nxp,lpc-iocon-pio";
70 compatible = "nxp,lpc-iocon-pio";
75 compatible = "nxp,lpc-iocon-pio";
82 compatible = "nxp,lpc11u6x-gpio";
84 interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
85 <4 2>, <5 2>, <6 2>, <7 2>;
87 gpio-controller;
88 #gpio-cells = <2>;
99 compatible = "nxp,lpc11u6x-gpio";
101 interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
102 <4 2>, <5 2>, <6 2>, <7 2>;
104 gpio-controller;
105 #gpio-cells = <2>;
114 gpio2: gpio@2 {
115 compatible = "nxp,lpc11u6x-gpio";
117 interrupts = <0 2>, <1 2>, <2 2>, <3 2>, \
118 <4 2>, <5 2>, <6 2>, <7 2>;
120 gpio-controller;
121 #gpio-cells = <2>;
122 base = <2>;
131 syscon: clock-controller@40048000 {
132 compatible = "nxp,lpc11u6x-syscon";
133 #clock-cells = <1>;
138 compatible = "nxp,lpc11u6x-uart";
146 compatible = "nxp,lpc11u6x-uart";
154 compatible = "nxp,lpc11u6x-uart";
162 compatible = "nxp,lpc11u6x-uart";
170 compatible = "nxp,lpc11u6x-uart";
178 compatible = "nxp,lpc11u6x-i2c";
179 #address-cells = <1>;
180 #size-cells = <0>;
188 compatible = "nxp,lpc11u6x-i2c";
189 #address-cells = <1>;
190 #size-cells = <0>;
200 arm,num-irq-priority-bits = <2>;