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/Zephyr-latest/drivers/sensor/bosch/bmi08x/
Dbmi08x_config_file.h13 0xc8, 0x2e, 0x00, 0x2e, 0x80, 0x2e, 0x48, 0xb4, 0xc8, 0x2e, 0x00, 0x2e, 0x80, 0x2e, 0x6d,
14 0xb4, 0xc8, 0x2e, 0x00, 0x2e, 0x80, 0x2e, 0xd4, 0xb3, 0x80, 0x2e, 0xb0, 0xb3, 0x80, 0x2e,
15 0x12, 0xb4, 0x50, 0x39, 0x21, 0x2e, 0xb0, 0xf0, 0x10, 0x30, 0x21, 0x2e, 0x16, 0xf0, 0x80,
16 0x2e, 0xfe, 0xb4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45,
18 0x79, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e,
19 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80,
20 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00,
21 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18,
22 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e,
[all …]
/Zephyr-latest/drivers/display/
Ddisplay_hx8394.c29 #define HX8394_SETMIPI 0xBA
32 #define HX8394_MIPI_TA_6TL 0x3
33 #define HX8394_MIPI_DPHYCMD_LPRX_8NS 0x40
34 #define HX8394_MIPI_DPHYCMD_LPRX_66mV 0x20
35 #define HX8394_MIPI_DPHYCMD_LPTX_SRLIM 0x8
36 #define HX8394_MIPI_DPHYCMD_LDO_1_55V 0x60
37 #define HX8394_MIPI_DPHYCMD_HSRX_7X 0x8
38 #define HX8394_MIPI_DPHYCMD_HSRX_100OHM 0x2
39 #define HX8394_MIPI_DPHYCMD_LPCD_1X 0x1
41 #define HX8394_SET_ADDRESS 0x36
[all …]
/Zephyr-latest/subsys/fb/
Dcfb_fonts.c20 0x00, 0x00,
21 0x00, 0x00,
22 0x00, 0x00,
23 0x00, 0x00,
24 0x00, 0x00,
25 0x00, 0x00,
26 0x00, 0x00,
27 0x00, 0x00,
28 0x00, 0x00,
29 0x00, 0x00,
[all …]
/Zephyr-latest/dts/bindings/sensor/
Dst,lsm6dso16is-common.yaml12 lsm6dso16is: lsm6dso16is@0 {
49 default: 0
53 - 0 # LSM6DSO16IS_DT_FS_2G (0.061 mg/LSB)
58 enum: [0, 1, 2, 3]
62 default: 0x0
69 - 0x00 # LSM6DSO16IS_DT_ODR_OFF
70 - 0x01 # LSM6DSO16IS_DT_ODR_12Hz5_HP
71 - 0x02 # LSM6DSO16IS_DT_ODR_26H_HP
72 - 0x03 # LSM6DSO16IS_DT_ODR_52Hz_HP
73 - 0x04 # LSM6DSO16IS_DT_ODR_104Hz_HP
[all …]
/Zephyr-latest/arch/arm64/core/
Dvector_table.S50 msr SPSel, #0
52 stp x18, lr, [sp, -(___esf_t_SIZEOF - ___esf_t_x18_lr_OFFSET)]
66 /* The expection from el1 does not need to save x16, x17, x18 and lr */
70 stp x18, lr, [sp, ___esf_t_x18_lr_OFFSET]
113 * - FIQ: group 0 or secure interrupts
125 * | VBAR_ELn + 0x000 | Synchronous | Current EL with SP0 |
126 * | + 0x080 | IRQ / vIRQ | |
127 * | + 0x100 | FIQ / vFIQ | |
128 * | + 0x180 | SError / vSError | |
130 * | + 0x200 | Synchronous | Current EL with SPx |
[all …]
/Zephyr-latest/tests/subsys/llext/src/
Dmulti_file_ext1.c17 int number = 0x42;
31 number = 0x42; in test_entry()
41 zassert_equal(number, 0x42); in test_entry()
42 zassert_equal(ext_number, 0x18); in test_entry()
46 zassert_equal(number, 0x18); in test_entry()
47 zassert_equal(ext_number, 0x42); in test_entry()
Dmulti_file_ext2.c10 int ext_number = 0x18;
/Zephyr-latest/drivers/memc/
Dmemc_mcux_flexspi_w956a8mbya.c42 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0xA0,
43 kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x18),
44 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_CADDR_DDR, kFLEXSPI_8PAD, 0x10,
45 kFLEXSPI_Command_DUMMY_RWDS_DDR, kFLEXSPI_8PAD, 0x07),
46 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_DDR, kFLEXSPI_8PAD, 0x04,
47 kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00),
52 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0x20,
53 kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x18),
54 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_CADDR_DDR, kFLEXSPI_8PAD, 0x10,
55 kFLEXSPI_Command_DUMMY_RWDS_DDR, kFLEXSPI_8PAD, 0x07),
[all …]
Dmemc_mcux_flexspi_s27ks0641.c21 #if defined(CONFIG_FLASH_MCUX_FLEXSPI_XIP) && (CONFIG_MEMC_LOG_LEVEL > 0)
48 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0xA0,
49 kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x18),
50 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_CADDR_DDR, kFLEXSPI_8PAD, 0x10,
51 kFLEXSPI_Command_DUMMY_RWDS_DDR, kFLEXSPI_8PAD, 0x06),
52 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_READ_DDR, kFLEXSPI_8PAD, 0x04,
53 kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0x00),
58 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_DDR, kFLEXSPI_8PAD, 0x20,
59 kFLEXSPI_Command_RADDR_DDR, kFLEXSPI_8PAD, 0x18),
60 FLEXSPI_LUT_SEQ(kFLEXSPI_Command_CADDR_DDR, kFLEXSPI_8PAD, 0x10,
[all …]
/Zephyr-latest/arch/sparc/core/
Dstack_offsets.h16 #define STACK_FRAME_L0_OFFSET 0x00
17 #define STACK_FRAME_L1_OFFSET 0x04
18 #define STACK_FRAME_L2_OFFSET 0x08
19 #define STACK_FRAME_L3_OFFSET 0x0c
20 #define STACK_FRAME_L4_OFFSET 0x10
21 #define STACK_FRAME_L5_OFFSET 0x14
22 #define STACK_FRAME_L6_OFFSET 0x18
23 #define STACK_FRAME_L7_OFFSET 0x1c
24 #define STACK_FRAME_I0_OFFSET 0x20
25 #define STACK_FRAME_I1_OFFSET 0x24
[all …]
Dfault_trap.S59 std %l0, [%sp + 0x00]
60 std %l2, [%sp + 0x08]
61 std %l4, [%sp + 0x10]
62 std %l6, [%sp + 0x18]
63 std %i0, [%sp + 0x20]
64 std %i2, [%sp + 0x28]
65 std %i4, [%sp + 0x30]
66 std %i6, [%sp + 0x38]
84 std %i0, [%sp + 96 + __struct_arch_esf_out_OFFSET + 0x00]
85 std %i2, [%sp + 96 + __struct_arch_esf_out_OFFSET + 0x08]
[all …]
/Zephyr-latest/include/zephyr/drivers/clock_control/
Dclock_agilex_ll.h13 #define CLKMGR_OFFSET 0xffd10000
15 #define CLKMGR_CTRL 0x0
16 #define CLKMGR_STAT 0x4
17 #define CLKMGR_INTRCLR 0x14
20 #define CLKMGR_MAINPLL 0xffd10024
21 #define CLKMGR_MAINPLL_EN 0x0
22 #define CLKMGR_MAINPLL_BYPASS 0xc
23 #define CLKMGR_MAINPLL_MPUCLK 0x18
24 #define CLKMGR_MAINPLL_NOCCLK 0x1c
25 #define CLKMGR_MAINPLL_NOCDIV 0x20
[all …]
/Zephyr-latest/tests/lib/cmsis_dsp/filtering/src/
Dmisc_q7.pat2 0xF3, 0xAE, 0x42, 0x21, 0x19, 0xE2, 0x32, 0x15,
3 0xF9, 0xC4, 0xB6, 0xE3, 0xE1, 0x49, 0x2F, 0x1A,
4 0xF9, 0xE0, 0x28, 0xEA, 0xF1, 0x41, 0x7F, 0x32,
5 0xD5, 0x04, 0xBF, 0x0B, 0xD0, 0xBC, 0x16, 0x20,
6 0xBD, 0x08, 0xD8, 0xF4, 0x2E, 0x13, 0xFB, 0xC4,
7 0x26, 0xF2, 0x05, 0x0E, 0xA9, 0x09, 0xDE, 0x42,
8 0x30, 0xFC, 0x16, 0xDB, 0x17, 0xD8, 0x02, 0x2C,
9 0xFD, 0x05, 0xEF, 0x02, 0x13, 0xDA, 0x03, 0x2D,
10 0x24, 0x0D, 0x0D, 0xE8, 0xF4, 0xB5, 0xF6, 0xB6,
11 0x1C, 0xDE, 0x09, 0x03, 0xF0, 0xCD, 0x0B, 0xB0,
[all …]
/Zephyr-latest/tests/subsys/canbus/isotp/implementation/src/
Drandom_data.h8 0x17, 0xee, 0x94, 0x6b, 0xb0, 0x3c, 0x0d, 0x75, 0x0f, 0x25, 0x49, 0x6a,
9 0x88, 0x08, 0x1d, 0x14, 0x65, 0x2a, 0xdb, 0x8d, 0xaa, 0xc8, 0x4e, 0x2e,
10 0x3a, 0x0e, 0xe8, 0x79, 0xcd, 0x0d, 0x8f, 0x20, 0xac, 0x18, 0xeb, 0x78,
11 0xa3, 0xdd, 0x0d, 0x76, 0x90, 0x64, 0x8f, 0x42, 0x93, 0xfd, 0x8d, 0xfe,
12 0x96, 0x60, 0xc5, 0x9c, 0xb9, 0xc1, 0x86, 0x41, 0x99, 0x6c, 0x5f, 0x5c,
13 0x6e, 0xdb, 0xbb, 0x49, 0x63, 0x18, 0xf9, 0x90, 0x6e, 0x8e, 0xcb, 0x1e,
14 0xd1, 0x59, 0xcf, 0x50, 0x65, 0x10, 0x29, 0xeb, 0x81, 0x91, 0xa6, 0xc2,
15 0xd7, 0x7b, 0xf6, 0xbf, 0xac, 0x42, 0x71, 0x1d, 0x43, 0xb9, 0x72, 0x18,
16 0x8e, 0xcf, 0xdc, 0x6c, 0x13, 0x70, 0x1d, 0xfa, 0xb0, 0x53, 0x57, 0xb0,
17 0x6c, 0x89, 0x42, 0xe9, 0x0a, 0x2f, 0xcd, 0x89, 0x74, 0x55, 0x77, 0xdc,
[all …]
/Zephyr-latest/dts/arm/renesas/rz/rzg/
Dr9a08g045.dtsi17 #size-cells = <0>;
19 cpu0: cpu@0 {
22 reg = <0>;
29 reg = <0xe000ed90 0x40>;
37 reg = <0x41030000 DT_SIZE_K(64)>;
52 #size-cells = <0>;
55 gpio0: gpio@0 {
60 reg = <0x0>;
69 reg = <0x1000>;
78 reg = <0x1100>;
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dstm32l1_reset.h13 #define STM32_RESET_BUS_AHB1 0x10
14 #define STM32_RESET_BUS_APB1 0x18
15 #define STM32_RESET_BUS_APB2 0x14
Dstm32f2_4_7_reset.h13 #define STM32_RESET_BUS_AHB1 0x10
14 #define STM32_RESET_BUS_AHB2 0x14
15 #define STM32_RESET_BUS_AHB3 0x18
16 #define STM32_RESET_BUS_APB1 0x20
17 #define STM32_RESET_BUS_APB2 0x24
/Zephyr-latest/samples/drivers/w1/scanner/
Dds2482-800.overlay6 reg = <0x18>;
9 #size-cells = <0>;
11 w1: ch@0 {
13 reg = <0>;
Dds2484.overlay6 reg = <0x18>;
/Zephyr-latest/boards/nxp/frdm_k64f/
DKconfig.defconfig12 default 0x13
15 default 0x18
/Zephyr-latest/samples/modules/tflite-micro/hello_world/src/
Dmodel.cpp31 0x1c, 0x00, 0x00, 0x00, 0x54, 0x46, 0x4c, 0x33, 0x14, 0x00, 0x20, 0x00,
32 0x1c, 0x00, 0x18, 0x00, 0x14, 0x00, 0x10, 0x00, 0x0c, 0x00, 0x00, 0x00,
33 0x08, 0x00, 0x04, 0x00, 0x14, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x00,
34 0x98, 0x00, 0x00, 0x00, 0xc8, 0x00, 0x00, 0x00, 0x1c, 0x03, 0x00, 0x00,
35 0x2c, 0x03, 0x00, 0x00, 0x30, 0x09, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
36 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x60, 0xf7, 0xff, 0xff,
37 0x10, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00,
38 0x44, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x73, 0x65, 0x72, 0x76,
39 0x65, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x73, 0x65, 0x72, 0x76,
40 0x69, 0x6e, 0x67, 0x5f, 0x64, 0x65, 0x66, 0x61, 0x75, 0x6c, 0x74, 0x00,
[all …]
/Zephyr-latest/samples/sensor/mpr/boards/
Darduino_due.overlay10 reg = <0x18>;
/Zephyr-latest/tests/drivers/w1/w1_api/
Dds2482-800.overlay10 reg = <0x18>;
13 #size-cells = <0>;
15 w1_0: ch@0 {
17 reg = <0>;
/Zephyr-latest/tests/kernel/fpu_sharing/generic/src/
Dfloat_regs_sparc.h16 "ldd [%0 + 0x00], %%f0\n" in _load_all_float_registers()
17 "ldd [%0 + 0x08], %%f2\n" in _load_all_float_registers()
18 "ldd [%0 + 0x10], %%f4\n" in _load_all_float_registers()
19 "ldd [%0 + 0x18], %%f6\n" in _load_all_float_registers()
20 "ldd [%0 + 0x20], %%f8\n" in _load_all_float_registers()
21 "ldd [%0 + 0x28], %%f10\n" in _load_all_float_registers()
22 "ldd [%0 + 0x30], %%f12\n" in _load_all_float_registers()
23 "ldd [%0 + 0x38], %%f14\n" in _load_all_float_registers()
24 "ldd [%0 + 0x40], %%f16\n" in _load_all_float_registers()
25 "ldd [%0 + 0x48], %%f18\n" in _load_all_float_registers()
[all …]
/Zephyr-latest/tests/bsim/bluetooth/host/att/retry_on_sec_err/
Dcommon_defs.h8 BT_UUID_DECLARE_128(0x1f, 0x5c, 0x31, 0x85, 0x05, 0xe8, 0x4d, 0x58, 0xb9, 0xf5, 0xae, \
9 0xf1, 0x7a, 0x88, 0xbe, 0x82)
11 BT_UUID_DECLARE_128(0x68, 0xb4, 0x35, 0x19, 0x01, 0x65, 0x4d, 0xdc, 0xb9, 0xf3, 0x91, \
12 0x0f, 0xf3, 0x18, 0x46, 0x7b)

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