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Searched defs:SRAM1_BASE_NS (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h885 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
Dstm32wba54xx.h1045 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
Dstm32wba52xx.h983 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
Dstm32wba5mxx.h1045 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
Dstm32wba55xx.h1045 #define SRAM1_BASE_NS 0x20000000UL /*!< SRAM1 non-secure base address … macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h1178 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (16 KB) non-secure base address … macro
Dstm32h523xx.h1482 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (128 KB) non-secure base address … macro
Dstm32h533xx.h1546 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (128 KB) non-secure base address … macro
Dstm32h562xx.h1571 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (256 KB) non-secure base address … macro
Dstm32h573xx.h1813 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (256 KB) non-secure base address … macro
Dstm32h563xx.h1749 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (256 KB) non-secure base address … macro
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h1346 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1(up to 192 KB) base address */ macro
Dstm32l562xx.h1420 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1(up to 192 KB) base address */ macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1517 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
Dstm32u535xx.h1439 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
Dstm32u575xx.h1653 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
Dstm32u585xx.h1732 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (192 KB) non-secure base address … macro
Dstm32u595xx.h1704 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
Dstm32u5a5xx.h1783 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
Dstm32u5f7xx.h1867 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
Dstm32u599xx.h1885 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
Dstm32u5g7xx.h1946 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
Dstm32u5f9xx.h1971 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
Dstm32u5a9xx.h1964 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro
Dstm32u5g9xx.h2050 #define SRAM1_BASE_NS (0x20000000UL) /*!< SRAM1 (768 KB) non-secure base address … macro