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Searched refs:rcc (Results 1 – 19 of 19) sorted by relevance

/trusted-firmware-a-latest/fdts/
Dstm32mp131.dtsi22 clocks = <&rcc CK_MPU>;
85 clocks = <&rcc USART3_K>;
86 resets = <&rcc USART3_R>;
94 clocks = <&rcc UART4_K>;
95 resets = <&rcc UART4_R>;
103 clocks = <&rcc UART5_K>;
104 resets = <&rcc UART5_R>;
112 clocks = <&rcc UART7_K>;
113 resets = <&rcc UART7_R>;
121 clocks = <&rcc UART8_K>;
[all …]
Dstm32mp151.dtsi84 clocks = <&rcc TIM12_K>;
93 clocks = <&rcc USART2_K>;
94 resets = <&rcc USART2_R>;
102 clocks = <&rcc USART3_K>;
103 resets = <&rcc USART3_R>;
111 clocks = <&rcc UART4_K>;
112 resets = <&rcc UART4_R>;
121 clocks = <&rcc UART5_K>;
122 resets = <&rcc UART5_R>;
132 clocks = <&rcc I2C2_K>;
[all …]
Dstm32mp13xc.dtsi14 clocks = <&rcc SAES_K>;
15 resets = <&rcc SAES_R>;
22 clocks = <&rcc PKA>;
23 resets = <&rcc PKA_R>;
Dstm32mp13xf.dtsi13 clocks = <&rcc SAES_K>;
14 resets = <&rcc SAES_R>;
21 clocks = <&rcc PKA>;
22 resets = <&rcc PKA_R>;
Dstm32mp251.dtsi96 clocks = <&rcc CK_KER_USART2>;
97 resets = <&rcc USART2_R>;
102 rcc: rcc@44200000 { label
103 compatible = "st,stm32mp25-rcc";
152 clocks = <&rcc CK_BUS_GPIOA>;
163 clocks = <&rcc CK_BUS_GPIOB>;
174 clocks = <&rcc CK_BUS_GPIOC>;
185 clocks = <&rcc CK_BUS_GPIOD>;
196 clocks = <&rcc CK_BUS_GPIOE>;
207 clocks = <&rcc CK_BUS_GPIOF>;
[all …]
Dstm32mp15xc.dtsi13 clocks = <&rcc CRYP1>;
14 resets = <&rcc CRYP1_R>;
Dstm32mp153.dtsi15 clocks = <&rcc CK_MPU>;
Dstm32mp151a-prtt1a.dts68 &rcc {
Dstm32mp15xx-osd32.dtsi183 &rcc {
Dstm32mp15xx-dhcor-som.dtsi186 &rcc {
Dstm32mp15xx-dkx.dtsi196 &rcc {
Dstm32mp135f-dk.dts187 &rcc {
Dstm32mp157a-avenger96.dts173 &rcc {
Dstm32mp157c-ed1.dts192 &rcc {
Dstm32mp157c-odyssey-som.dtsi205 &rcc {
Dstm32mp15xx-dhcom-som.dtsi191 &rcc {
/trusted-firmware-a-latest/drivers/st/ddr/
Dstm32mp1_ram.c93 mmio_clrbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_AXIDCGEN); in stm32mp1_ddr_setup()
98 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_AXIDCGEN); in stm32mp1_ddr_setup()
148 priv->rcc = stm32mp_rcc_base(); in stm32mp1_ddr_probe()
Dstm32mp1_ddr.c594 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DDRCAPBRST); in stm32mp1_ddr_init()
595 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DDRCAXIRST); in stm32mp1_ddr_init()
596 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DDRCORERST); in stm32mp1_ddr_init()
597 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DPHYAPBRST); in stm32mp1_ddr_init()
598 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DPHYRST); in stm32mp1_ddr_init()
599 mmio_setbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DPHYCTLRST); in stm32mp1_ddr_init()
608 mmio_clrbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DPHYRST); in stm32mp1_ddr_init()
609 mmio_clrbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DPHYCTLRST); in stm32mp1_ddr_init()
614 mmio_clrbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DDRCAPBRST); in stm32mp1_ddr_init()
656 mmio_clrbits_32(priv->rcc + RCC_DDRITFCR, RCC_DDRITFCR_DDRCORERST); in stm32mp1_ddr_init()
[all …]
/trusted-firmware-a-latest/include/drivers/st/
Dstm32mp_ddr.h51 uintptr_t rcc; member