| /trusted-firmware-a-latest/plat/xilinx/versal/ |
| D | bl31_versal_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
46 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
54 bl32_image_ep_info.pc = (uintptr_t)BL32_BASE; in bl31_set_default_config()
55 bl32_image_ep_info.spsr = (uint32_t)arm_get_spsr_for_bl32_entry(); in bl31_set_default_config()
91 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
92 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
107 enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info, in bl31_early_platform_setup2()
128 if (bl32_image_ep_info.pc == 0 && bl32_image_ep_info.spsr != 0) { in bl31_early_platform_setup2()
129 bl32_image_ep_info.pc = (uintptr_t)BL32_BASE; in bl31_early_platform_setup2()
133 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/xilinx/versal_net/ |
| D | bl31_versal_net_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
46 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
54 bl32_image_ep_info.pc = BL32_BASE; in bl31_set_default_config()
55 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); in bl31_set_default_config()
112 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
113 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
126 xbl_ret = xbl_handover(&bl32_image_ep_info, &bl33_image_ep_info, in bl31_early_platform_setup2()
144 if (bl32_image_ep_info.pc == 0 && bl32_image_ep_info.spsr != 0) { in bl31_early_platform_setup2()
145 bl32_image_ep_info.pc = (uintptr_t)BL32_BASE; in bl31_early_platform_setup2()
156 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/marvell/armada/common/ |
| D | marvell_bl31_setup.c | 27 static entry_point_info_t bl32_image_ep_info; variable
50 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
79 SET_PARAM_HEAD(&bl32_image_ep_info, in marvell_bl31_early_platform_setup()
83 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in marvell_bl31_early_platform_setup()
84 bl32_image_ep_info.pc = BL32_BASE; in marvell_bl31_early_platform_setup()
85 bl32_image_ep_info.spsr = marvell_get_spsr_for_bl32_entry(); in marvell_bl31_early_platform_setup()
126 bl32_image_ep_info = *bl_params->ep_info; in marvell_bl31_early_platform_setup()
|
| /trusted-firmware-a-latest/plat/xilinx/zynqmp/ |
| D | bl31_zynqmp_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
46 next_image_info = &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
58 bl32_image_ep_info.pc = BL32_BASE; in bl31_set_default_config()
59 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); in bl31_set_default_config()
89 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
90 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
100 enum xbl_handoff ret = xbl_handover(&bl32_image_ep_info, in bl31_early_platform_setup2()
107 if (bl32_image_ep_info.pc != 0) { in bl31_early_platform_setup2()
108 NOTICE("BL31: Secure code at 0x%lx\n", bl32_image_ep_info.pc); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/imx/imx93/ |
| D | imx93_bl31_setup.c | 38 static entry_point_info_t bl32_image_ep_info; variable
79 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
80 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
81 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
82 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
91 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
151 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mn/ |
| D | imx8mn_bl31_setup.c | 83 static entry_point_info_t bl32_image_ep_info; variable
175 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
176 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
177 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
178 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
185 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
186 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
191 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
252 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mp/ |
| D | imx8mp_bl31_setup.c | 79 static entry_point_info_t bl32_image_ep_info; variable
164 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
165 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
166 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
167 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
174 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
175 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
180 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
243 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/arm/common/ |
| D | arm_bl31_setup.c | 27 static entry_point_info_t bl32_image_ep_info; variable
97 next_image_info = &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
131 SET_PARAM_HEAD(&bl32_image_ep_info, in arm_bl31_early_platform_setup()
135 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in arm_bl31_early_platform_setup()
136 bl32_image_ep_info.pc = BL32_BASE; in arm_bl31_early_platform_setup()
137 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); in arm_bl31_early_platform_setup()
146 bl32_image_ep_info.args.arg0 = ARM_TRUSTED_SRAM_BASE + in arm_bl31_early_platform_setup()
200 bl32_image_ep_info = *bl_params->ep_info; in arm_bl31_early_platform_setup()
211 bl32_image_ep_info.args.arg2 = in arm_bl31_early_platform_setup()
213 bl32_image_ep_info.args.arg3 = in arm_bl31_early_platform_setup()
[all …]
|
| /trusted-firmware-a-latest/plat/allwinner/common/ |
| D | sunxi_bl31_setup.c | 30 static entry_point_info_t bl32_image_ep_info; variable
90 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
91 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
92 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
200 if ((type == SECURE) && bl32_image_ep_info.pc) in bl31_plat_get_next_image_ep_info()
201 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mm/ |
| D | imx8mm_bl31_setup.c | 92 static entry_point_info_t bl32_image_ep_info; variable
171 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
172 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
173 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
174 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
181 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
182 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
187 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
248 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/imx/imx8m/imx8mq/ |
| D | imx8mq_bl31_setup.c | 65 static entry_point_info_t bl32_image_ep_info; variable
174 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
175 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
176 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
177 bl32_image_ep_info.spsr = 0; in bl31_early_platform_setup2()
184 bl32_image_ep_info.args.arg0 = BL32_SIZE; in bl31_early_platform_setup2()
185 bl32_image_ep_info.args.arg1 = BL32_BASE; in bl31_early_platform_setup2()
190 bl32_image_ep_info.args.arg3 = BL32_FDT_OVERLAY_ADDR; in bl31_early_platform_setup2()
241 return &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/nuvoton/npcm845x/ |
| D | npcm845x_bl31_setup.c | 34 static entry_point_info_t bl32_image_ep_info; variable
70 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
146 SET_PARAM_HEAD(&bl32_image_ep_info, in bl31_early_platform_setup2()
150 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
151 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
152 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); in bl31_early_platform_setup2()
162 bl32_image_ep_info.args.arg0 = ARM_TRUSTED_SRAM_BASE + in bl31_early_platform_setup2()
232 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/socionext/synquacer/ |
| D | sq_bl31_setup.c | 20 static entry_point_info_t bl32_image_ep_info; variable
44 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
66 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
136 SET_PARAM_HEAD(&bl32_image_ep_info, in bl31_early_platform_setup2()
140 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
141 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
142 bl32_image_ep_info.spsr = sq_get_spsr_for_bl32_entry(); in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/brcm/common/ |
| D | brcm_bl31_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
65 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
103 SET_PARAM_HEAD(&bl32_image_ep_info, in brcm_bl31_early_platform_setup()
107 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in brcm_bl31_early_platform_setup()
108 bl32_image_ep_info.pc = BL32_BASE; in brcm_bl31_early_platform_setup()
109 bl32_image_ep_info.spsr = brcm_get_spsr_for_bl32_entry(); in brcm_bl31_early_platform_setup()
167 bl32_image_ep_info = *bl_params->ep_info; in brcm_bl31_early_platform_setup()
|
| /trusted-firmware-a-latest/plat/ti/k3/common/ |
| D | k3_bl31_setup.c | 43 static entry_point_info_t bl32_image_ep_info; variable
77 SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); in bl31_early_platform_setup2()
78 bl32_image_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
79 bl32_image_ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, in bl31_early_platform_setup2()
81 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
182 &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/socionext/uniphier/ |
| D | uniphier_bl31_setup.c | 21 static entry_point_info_t bl32_image_ep_info; variable
28 return type == NON_SECURE ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
48 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/hisilicon/poplar/ |
| D | bl31_plat_setup.c | 32 static entry_point_info_t bl32_image_ep_info; variable
47 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
96 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/amlogic/axg/ |
| D | axg_bl31_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
38 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
95 bl32_image_ep_info.args.arg0 = MODE_RW_32; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/qemu/common/ |
| D | qemu_bl31_setup.c | 41 static entry_point_info_t bl32_image_ep_info; variable
80 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
139 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
|
| /trusted-firmware-a-latest/plat/amlogic/g12a/ |
| D | g12a_bl31_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
38 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/rpi/rpi3/ |
| D | rpi3_bl31_setup.c | 24 static entry_point_info_t bl32_image_ep_info; variable
40 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
98 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/nvidia/tegra/common/ |
| D | tegra_bl31_setup.c | 47 static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info; variable
72 } else if ((type == SECURE) && (bl32_image_ep_info.pc != 0U)) { in bl31_plat_get_next_image_ep_info()
73 ep = &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
115 bl32_image_ep_info = *arg_from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/intel/soc/n5x/ |
| D | bl31_plat_setup.c | 20 static entry_point_info_t bl32_image_ep_info; variable
28 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
79 bl32_image_ep_info = *arg_from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/intel/soc/agilex/ |
| D | bl31_plat_setup.c | 22 static entry_point_info_t bl32_image_ep_info; variable
30 &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
98 bl32_image_ep_info = *arg_from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
|
| /trusted-firmware-a-latest/plat/nxp/common/setup/ |
| D | ls_bl31_setup.c | 29 static entry_point_info_t bl32_image_ep_info; variable
63 ? &bl33_image_ep_info : &bl32_image_ep_info; in bl31_plat_get_next_image_ep_info()
147 bl32_image_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
|
