1 /*
2  * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 
9 #include <common/bl_common.h>
10 #include <drivers/arm/pl061_gpio.h>
11 #include <plat/common/platform.h>
12 
13 #include "qemu_private.h"
14 
15 #define MAP_BL31_TOTAL		MAP_REGION_FLAT(			\
16 					BL31_BASE,			\
17 					BL31_END - BL31_BASE,		\
18 					MT_MEMORY | MT_RW | EL3_PAS)
19 #define MAP_BL31_RO		MAP_REGION_FLAT(			\
20 					BL_CODE_BASE,			\
21 					BL_CODE_END - BL_CODE_BASE,	\
22 					MT_CODE | EL3_PAS),		\
23 				MAP_REGION_FLAT(			\
24 					BL_RO_DATA_BASE,		\
25 					BL_RO_DATA_END			\
26 						- BL_RO_DATA_BASE,	\
27 					MT_RO_DATA | EL3_PAS)
28 
29 #if USE_COHERENT_MEM
30 #define MAP_BL_COHERENT_RAM	MAP_REGION_FLAT(			\
31 					BL_COHERENT_RAM_BASE,		\
32 					BL_COHERENT_RAM_END		\
33 						- BL_COHERENT_RAM_BASE,	\
34 					MT_DEVICE | MT_RW | EL3_PAS)
35 #endif
36 
37 /*
38  * Placeholder variables for copying the arguments that have been passed to
39  * BL3-1 from BL2.
40  */
41 static entry_point_info_t bl32_image_ep_info;
42 static entry_point_info_t bl33_image_ep_info;
43 
44 /*******************************************************************************
45  * Perform any BL3-1 early platform setup.  Here is an opportunity to copy
46  * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before
47  * they are lost (potentially). This needs to be done before the MMU is
48  * initialized so that the memory layout can be used while creating page
49  * tables. BL2 has flushed this information to memory, so we are guaranteed
50  * to pick up good data.
51  ******************************************************************************/
bl31_early_platform_setup2(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)52 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
53 				u_register_t arg2, u_register_t arg3)
54 {
55 	/* Initialize the console to provide early debug support */
56 	qemu_console_init();
57 
58 /* Platform names have to be lowercase. */
59 #ifdef PLAT_qemu_sbsa
60 	sip_svc_init();
61 #endif
62 
63 	/*
64 	 * Check params passed from BL2
65 	 */
66 	bl_params_t *params_from_bl2 = (bl_params_t *)arg0;
67 
68 	assert(params_from_bl2);
69 	assert(params_from_bl2->h.type == PARAM_BL_PARAMS);
70 	assert(params_from_bl2->h.version >= VERSION_2);
71 
72 	bl_params_node_t *bl_params = params_from_bl2->head;
73 
74 	/*
75 	 * Copy BL33 and BL32 (if present), entry point information.
76 	 * They are stored in Secure RAM, in BL2's address space.
77 	 */
78 	while (bl_params) {
79 		if (bl_params->image_id == BL32_IMAGE_ID)
80 			bl32_image_ep_info = *bl_params->ep_info;
81 
82 		if (bl_params->image_id == BL33_IMAGE_ID)
83 			bl33_image_ep_info = *bl_params->ep_info;
84 
85 		bl_params = bl_params->next_params_info;
86 	}
87 
88 	if (!bl33_image_ep_info.pc)
89 		panic();
90 }
91 
bl31_plat_arch_setup(void)92 void bl31_plat_arch_setup(void)
93 {
94 	const mmap_region_t bl_regions[] = {
95 		MAP_BL31_TOTAL,
96 		MAP_BL31_RO,
97 #if USE_COHERENT_MEM
98 		MAP_BL_COHERENT_RAM,
99 #endif
100 		{0}
101 	};
102 
103 	setup_page_tables(bl_regions, plat_qemu_get_mmap());
104 
105 	enable_mmu_el3(0);
106 }
107 
qemu_gpio_init(void)108 static void qemu_gpio_init(void)
109 {
110 #ifdef SECURE_GPIO_BASE
111 	pl061_gpio_init();
112 	pl061_gpio_register(SECURE_GPIO_BASE, 0);
113 #endif
114 }
115 
bl31_platform_setup(void)116 void bl31_platform_setup(void)
117 {
118 	plat_qemu_gic_init();
119 	qemu_gpio_init();
120 }
121 
plat_get_syscnt_freq2(void)122 unsigned int plat_get_syscnt_freq2(void)
123 {
124 	return SYS_COUNTER_FREQ_IN_TICKS;
125 }
126 
127 /*******************************************************************************
128  * Return a pointer to the 'entry_point_info' structure of the next image
129  * for the security state specified. BL3-3 corresponds to the non-secure
130  * image type while BL3-2 corresponds to the secure image type. A NULL
131  * pointer is returned if the image does not exist.
132  ******************************************************************************/
bl31_plat_get_next_image_ep_info(uint32_t type)133 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
134 {
135 	entry_point_info_t *next_image_info;
136 
137 	assert(sec_state_is_valid(type));
138 	next_image_info = (type == NON_SECURE)
139 			? &bl33_image_ep_info : &bl32_image_ep_info;
140 	/*
141 	 * None of the images on the ARM development platforms can have 0x0
142 	 * as the entrypoint
143 	 */
144 	if (next_image_info->pc)
145 		return next_image_info;
146 	else
147 		return NULL;
148 }
149