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/nrf_hw_models-latest/src/HW_models/
DNHW_54_AAR_CCM_ECB.h13 void nhw_AAR_regw_sideeffects_INTENSET(unsigned int inst);
14 void nhw_AAR_regw_sideeffects_INTENCLR(unsigned int inst);
15 void nhw_AAR_regw_sideeffects_TASKS_START(unsigned int inst);
16 void nhw_AAR_regw_sideeffects_TASKS_STOP(unsigned int inst);
17 void nhw_AAR_regw_sideeffects_SUBSCRIBE_START(unsigned int inst);
18 void nhw_AAR_regw_sideeffects_SUBSCRIBE_STOP(unsigned int inst);
19 void nhw_AAR_regw_sideeffects_EVENTS_all(unsigned int inst);
21 void nhw_AARCCM_regw_sideeffects_ENABLE(unsigned int inst);
23 void nhw_CCM_regw_sideeffects_INTENSET(unsigned int inst);
24 void nhw_CCM_regw_sideeffects_INTENCLR(unsigned int inst);
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DNHW_UART.c112 static void nhw_UARTE_signal_EVENTS_ERROR(unsigned int inst);
113 static void nhw_UARTE_signal_EVENTS_RXDRDY(unsigned int inst);
114 static void nhw_UARTE_signal_EVENTS_RXTO(unsigned int inst);
115 static void nhw_UARTE_signal_EVENTS_TXDRDY(unsigned int inst);
116 static void nhw_UARTE_signal_EVENTS_CTS(unsigned int inst);
117 static void nhw_UARTE_signal_EVENTS_NCTS(unsigned int inst);
118 static void nhw_UARTE_signal_EVENTS_TXSTARTED(unsigned int inst);
119 static void nhw_UARTE_signal_EVENTS_TXSTOPPED(unsigned int inst);
120 static void nhw_UARTE_signal_EVENTS_ENDTX(unsigned int inst);
121 static void nhw_UARTE_signal_EVENTS_RXSTARTED(unsigned int inst);
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DNHW_RADIO_signals.h15 void nhw_RADIO_signal_EVENTS_READY(unsigned int inst);
16 void nhw_RADIO_signal_EVENTS_ADDRESS(unsigned int inst);
17 void nhw_RADIO_signal_EVENTS_PAYLOAD(unsigned int inst);
18 void nhw_RADIO_signal_EVENTS_END(unsigned int inst);
19 void nhw_RADIO_signal_EVENTS_DISABLED(unsigned int inst);
20 void nhw_RADIO_signal_EVENTS_DEVMATCH(unsigned int inst);
21 void nhw_RADIO_signal_EVENTS_DEVMISS(unsigned int inst);
22 void nhw_RADIO_signal_EVENTS_RSSIEND(unsigned int inst);
23 void nhw_RADIO_signal_EVENTS_BCMATCH(unsigned int inst);
24 void nhw_RADIO_signal_EVENTS_CRCOK(unsigned int inst);
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DNHW_54_AAR_CCM_ECB.c135 static bool nhw_ECB_possible_abort(uint inst);
136 static void nhw_AAR_TASK_START(uint inst);
137 static void nhw_AAR_TASK_STOP(uint inst);
138 static void nhw_CCM_TASK_START(uint inst);
139 static void nhw_CCM_TASK_STOP(uint inst);
196 static void nhw_AAR_eval_interrupt(uint inst) { in nhw_AAR_eval_interrupt() argument
199 uint32_t INTEN = nhw_aar_st[inst].INTEN; in nhw_AAR_eval_interrupt()
202 if (NRF_AAR_regs[inst]->ENABLE == AAR_ENABLE_ENABLE_Enabled) { in nhw_AAR_eval_interrupt()
203 NHW_CHECK_INTERRUPT(AAR, NRF_AAR_regs[inst]->, END, INTEN) in nhw_AAR_eval_interrupt()
204 NHW_CHECK_INTERRUPT(AAR, NRF_AAR_regs[inst]->, RESOLVED, INTEN) in nhw_AAR_eval_interrupt()
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Dirq_ctrl.h18 void hw_irq_ctrl_clear_all_irqs(unsigned int inst);
19 void hw_irq_ctrl_clear_irq(unsigned int inst, unsigned int irq);
20 void hw_irq_ctrl_reeval_level_irq(unsigned int inst, unsigned int irq);
21 void nhw_irq_controller_set_irq_mask(unsigned int inst, uint64_t mask);
22 void hw_irq_ctrl_enable_irq(unsigned int inst, unsigned int irq);
23 void hw_irq_ctrl_disable_irq(unsigned int inst, unsigned int irq);
24 int hw_irq_ctrl_set_wake_even_if_lock(unsigned int inst, int value);
25 int hw_irq_ctrl_is_irq_enabled(unsigned int inst, unsigned int irq);
26 int hw_irq_ctrl_is_irq_pending(unsigned int inst, unsigned int irq);
27 void hw_irq_ctrl_raise_im(unsigned int inst, uint32_t irq);
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DNHW_IPC.c80 static void nhw_IPC_eval_interrupt(uint inst) { in nhw_IPC_eval_interrupt() argument
86 struct ipc_status *this = &nhw_ipc_st[inst]; in nhw_IPC_eval_interrupt()
87 NRF_IPC_Type *IPC_regs = &NRF_IPC_regs[inst]; in nhw_IPC_eval_interrupt()
101 hw_irq_ctrl_toggle_level_irq_line_if(&ipc_int_line[inst], in nhw_IPC_eval_interrupt()
103 &nhw_ipc_irq_map[inst]); in nhw_IPC_eval_interrupt()
106 #define CHECK_VALID_CHANNEL(inst, ch, what) \ argument
107 if (nhw_ipc_st[inst].n_ch <= ch) { \
109 inst, what, ch, nhw_ipc_st[inst].n_ch); \
112 static void nhw_IPC_signal_EVENT(uint inst, uint ch) { in nhw_IPC_signal_EVENT() argument
113 NRF_IPC_regs[inst].EVENTS_RECEIVE[ch] = 1; in nhw_IPC_signal_EVENT()
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DNHW_NVMC.c140 for (int inst = 0; inst < NHW_NVMC_UICR_TOTAL_INST; inst++) { in nhw_nvmc_uicr_init() local
141 struct hw_nvmc_st_t *this = &hw_nvmc_st[inst]; in nhw_nvmc_uicr_init()
142 this->NVMC_regs = &NRF_NVMC_regs[inst]; in nhw_nvmc_uicr_init()
143 NRF_NVMC_regs_p[inst] = &NRF_NVMC_regs[inst]; in nhw_nvmc_uicr_init()
145 NRF_NVMC_regs[inst].READY = 1; in nhw_nvmc_uicr_init()
146 NRF_NVMC_regs[inst].READYNEXT = 1; in nhw_nvmc_uicr_init()
147 NRF_NVMC_regs[inst].ERASEPAGEPARTIALCFG = 0x0000000A; in nhw_nvmc_uicr_init()
152 this->flash_start_addr = flash_start_addr[inst]; in nhw_nvmc_uicr_init()
153 this->flash_n_pages = flash_n_pages[inst]; in nhw_nvmc_uicr_init()
154 this->flash_page_size = flash_page_sizes[inst]; in nhw_nvmc_uicr_init()
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Dirq_ctrl.c100 void hw_irq_ctrl_set_cur_prio(unsigned int inst, int new) in hw_irq_ctrl_set_cur_prio() argument
102 nhw_intctrl_st[inst].currently_running_prio = new; in hw_irq_ctrl_set_cur_prio()
105 int hw_irq_ctrl_get_cur_prio(unsigned int inst) in hw_irq_ctrl_get_cur_prio() argument
107 return nhw_intctrl_st[inst].currently_running_prio; in hw_irq_ctrl_get_cur_prio()
110 void hw_irq_ctrl_prio_set(unsigned int inst, unsigned int irq, unsigned int prio) in hw_irq_ctrl_prio_set() argument
112 nhw_intctrl_st[inst].irq_prio[irq] = prio; in hw_irq_ctrl_prio_set()
115 uint8_t hw_irq_ctrl_get_prio(unsigned int inst, unsigned int irq) in hw_irq_ctrl_get_prio() argument
117 return nhw_intctrl_st[inst].irq_prio[irq]; in hw_irq_ctrl_get_prio()
120 static inline bool irq_status_not_zero(unsigned int inst) { in irq_status_not_zero() argument
122 if (nhw_intctrl_st[inst].irq_status[i] != 0) { in irq_status_not_zero()
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DNHW_GRTC.h19 void nhw_GRTC_regw_sideeffects_TASKS_CAPTURE(uint inst, uint n);
20 void nhw_GRTC_regw_sideeffects_TASKS_START(uint inst);
21 void nhw_GRTC_regw_sideeffects_TASKS_STOP(uint inst);
22 void nhw_GRTC_regw_sideeffects_TASKS_CLEAR(uint inst);
23 void nhw_GRTC_regw_sideeffects_TASKS_PWMSTART(uint inst);
24 void nhw_GRTC_regw_sideeffects_TASKS_PWMSTOP(uint inst);
26 void nhw_GRTC_regw_sideeffects_SUBSCRIBE_CAPTURE(uint inst, uint n);
28 void nhw_GRTC_regw_sideeffects_EVENTS_all(uint inst);
30 void nhw_GRTC_regw_sideeffects_INTEN(uint inst, uint n);
31 void nhw_GRTC_regw_sideeffects_INTENSET(uint inst, uint n);
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DNRF_GPIOTE.c100 static void nhw_GPIOTE_signal_EVENTS_PORT(unsigned int inst);
116 void nrf_gpiote_TASKS_OUT(unsigned int inst, unsigned int n) { in nrf_gpiote_TASKS_OUT() argument
117 struct gpiote_ch_status_t *sc = &gpiote_st[inst].gpiote_ch_status[n]; in nrf_gpiote_TASKS_OUT()
141 void nrf_gpiote_TASKS_SET(unsigned int inst, unsigned int n) { in nrf_gpiote_TASKS_SET() argument
142 struct gpiote_ch_status_t *sc = &gpiote_st[inst].gpiote_ch_status[n]; in nrf_gpiote_TASKS_SET()
151 void nrf_gpiote_TASKS_CLR(unsigned int inst, unsigned int n) { in nrf_gpiote_TASKS_CLR() argument
152 struct gpiote_ch_status_t *sc = &gpiote_st[inst].gpiote_ch_status[n]; in nrf_gpiote_TASKS_CLR()
161 static void nrf_gpiote_eval_interrupt(unsigned int inst) { in nrf_gpiote_eval_interrupt() argument
162 struct gpiote_status *st = &gpiote_st[inst]; in nrf_gpiote_eval_interrupt()
171 if (NRF_GPIOTE_regs[inst].EVENTS_IN[i] && mask) { in nrf_gpiote_eval_interrupt()
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DNHW_GRTC.c97 static void nhw_GRTC_update_SYSCOUNTER(uint inst);
99 static void nhw_GRTC_update_cc_timer(uint inst, int cc);
100 static void nhw_GRTC_update_all_cc_timers(uint inst);
161 static inline void nhw_GRTC_check_valid_cc_index(uint inst, uint nbr, const char *type) in nhw_GRTC_check_valid_cc_index() argument
163 if ((inst >= NHW_GRTC_TOTAL_INST) || (nbr >= nhw_grtc_st.n_cc) ) { in nhw_GRTC_check_valid_cc_index()
165 type, nbr, nhw_grtc_st.n_cc, inst); in nhw_GRTC_check_valid_cc_index()
169 static inline void nhw_GRTC_check_valid_irq_index(uint inst, uint nbr, const char *type) in nhw_GRTC_check_valid_irq_index() argument
171 if ((inst >= NHW_GRTC_TOTAL_INST) || (nbr >= nhw_grtc_st.n_int) ) { in nhw_GRTC_check_valid_irq_index()
173 type, nbr, nhw_grtc_st.n_int, inst); in nhw_GRTC_check_valid_irq_index()
177 static inline void nhw_GRTC_check_valid_domain_index(uint inst, uint nbr, const char *type) in nhw_GRTC_check_valid_domain_index() argument
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DNHW_RRAMC.c110 for (int inst = 0; inst < NHW_RRAMC_UICR_TOTAL_INST; inst++) { in nhw_RRAMC_uicr_init() local
111 struct hw_rramc_st_t *this = &hw_rramc_st[inst]; in nhw_RRAMC_uicr_init()
112 this->RRAMC_regs = &NRF_RRAMC_regs[inst]; in nhw_RRAMC_uicr_init()
113 NRF_RRAMC_regs_p[inst] = &NRF_RRAMC_regs[inst]; in nhw_RRAMC_uicr_init()
115 NRF_RRAMC_regs[inst].READY = 1; in nhw_RRAMC_uicr_init()
116 NRF_RRAMC_regs[inst].READYNEXT = 1; in nhw_RRAMC_uicr_init()
117 NRF_RRAMC_regs[inst].EVENTS_READY = 1; in nhw_RRAMC_uicr_init()
118 NRF_RRAMC_regs[inst].EVENTS_READYNEXT = 1; in nhw_RRAMC_uicr_init()
119 NRF_RRAMC_regs[inst].ACCESSERRORADDR = 0x00FFFFFF; in nhw_RRAMC_uicr_init()
120 NRF_RRAMC_regs[inst].BUFSTATUS.WRITEBUFEMPTY = 1; in nhw_RRAMC_uicr_init()
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DNRF_GPIOTE.h13 void nrf_gpiote_port_detect_raise(unsigned int inst, unsigned int port);
15 void nrf_gpiote_regw_sideeffects_TASKS_OUT(unsigned int inst, unsigned int n);
16 void nrf_gpiote_regw_sideeffects_TASKS_SET(unsigned int inst, unsigned int n);
17 void nrf_gpiote_regw_sideeffects_TASKS_CLR(unsigned int inst, unsigned int n);
18 void nrf_gpiote_regw_sideeffects_EVENTS_IN(unsigned int inst, unsigned int n);
19 void nrf_gpiote_regw_sideeffects_EVENTS_PORT(unsigned int inst);
20 void nrf_gpiote_regw_sideeffects_INTENSET(unsigned int inst, unsigned int interrupt_nbr);
21 void nrf_gpiote_regw_sideeffects_INTENCLR(unsigned int inst, unsigned int interrupt_nbr);
22 void nrf_gpiote_regw_sideeffects_CONFIG(unsigned int inst, unsigned int n);
52 void nhw_gpiote_regw_sideeffects_SUBSCRIBE_OUT(unsigned int inst, unsigned int ch_n);
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DNHW_PPIB.c36 static void nhw_ppib_propagate_event_mate(uint inst, uint ppib_ch);
103 static void nhw_ppib_confirm_direction(uint inst, uint ppib_ch, bool source) in nhw_ppib_confirm_direction() argument
105 bool subscribe_enable = (NRF_PPIB_regs[inst].SUBSCRIBE_SEND[ppib_ch] & (0x1UL << 31)) != 0; in nhw_ppib_confirm_direction()
106 bool publish_enable = (NRF_PPIB_regs[inst].PUBLISH_RECEIVE[ppib_ch] & (0x1UL << 31)) != 0; in nhw_ppib_confirm_direction()
111 inst, ppib_ch); in nhw_ppib_confirm_direction()
116 inst, ppib_ch); in nhw_ppib_confirm_direction()
135 static void nhw_ppib_TASK_SEND(uint inst, uint ppib_ch) in nhw_ppib_TASK_SEND() argument
137 nhw_ppib_confirm_direction(inst, ppib_ch, true); in nhw_ppib_TASK_SEND()
138 nhw_ppib_propagate_event_mate(nhw_ppib_st[inst].ppib_mate, ppib_ch); in nhw_ppib_TASK_SEND()
145 unsigned int inst = (uintptr_t)param >> 16; in nhw_ppib_tasksend_wrap() local
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DNHW_UART.h31 void nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_ENABLEMATCH(uint inst, uint i);
32 void nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH(uint inst, uint i);
47 void nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_ENABLEMATCH(uint inst, uint i);
48 void nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_DISABLEMATCH(uint inst, uint i);
51 uint32_t nhw_UARTE_regr_sideeffects_ERRORSRC(unsigned int inst);
52 void nhw_UARTE_regw_sideeffects_ERRORSRC(unsigned int inst);
54 uint32_t nhw_UARTE_regr_sideeffects_RXD(unsigned int inst);
55 void nhw_UARTE_regw_sideeffects_TXD(unsigned int inst);
57 void nhw_UARTE_regw_sideeffects_ENABLE(unsigned int inst);
58 void nhw_UARTE_regw_sideeffects_CONFIG(unsigned int inst);
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DNHW_NVMC.h15 void nhw_nvmc_regw_sideeffects_ERASEPAGE(uint inst);
16 void nhw_nvmc_regw_sideeffects_ERASEPCR0(uint inst);
17 void nhw_nvmc_regw_sideeffects_ERASEUICR(uint inst);
18 void nhw_nvmc_regw_sideeffects_ERASEALL(uint inst);
19 void nhw_nvmc_regw_sideeffects_ERASEPAGEPARTIAL(uint inst);
20 void* nrfhw_nmvc_flash_get_base_address(uint inst);
21 bs_time_t nhw_nvmc_time_to_ready(uint inst);
23 void nhw_nvmc_erase_page(uint inst, uint32_t address);
24 void nhw_nvmc_erase_page_partial(uint inst, uint32_t address);
DNHW_EGU.c91 static void nhw_egu_eval_interrupt(uint inst) in nhw_egu_eval_interrupt() argument
97 struct egu_status *this = &nhw_egu_st[inst]; in nhw_egu_eval_interrupt()
109 hw_irq_ctrl_toggle_level_irq_line_if(&egu_int_line[inst], in nhw_egu_eval_interrupt()
111 &nhw_egu_irq_map[inst]); in nhw_egu_eval_interrupt()
122 static void nhw_egu_signal_EVENTS_TRIGGERED(uint inst, uint event_nbr) in nhw_egu_signal_EVENTS_TRIGGERED() argument
124 struct egu_status *this = &nhw_egu_st[inst]; in nhw_egu_signal_EVENTS_TRIGGERED()
128 nhw_egu_eval_interrupt(inst); in nhw_egu_signal_EVENTS_TRIGGERED()
141 nrf_ppi_event(PPI_EGU_EVENTS_base[inst]+ event_nbr); in nhw_egu_signal_EVENTS_TRIGGERED()
152 void nhw_egu_TASK_TRIGGER(uint inst, uint task_nbr) in nhw_egu_TASK_TRIGGER() argument
154 nhw_egu_check_inst_event(inst, task_nbr, "task"); in nhw_egu_TASK_TRIGGER()
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DNHW_UART_backend_if.h20 typedef void (*tx_byte_ft)(uint inst, uint16_t data);
21 typedef void (*RTS_pin_toggle_ft)(uint inst, bool new_level);
22 typedef void (*uart_enable_notify_ft)(uint inst, uint8_t tx_enabled, uint8_t rx_enabled);
31 void nhw_UARTE_digest_Rx_byte(uint inst, uint16_t byte);
32 bs_time_t nhw_uarte_one_byte_time(uint inst);
33 void nhw_UARTE_CTS_lowered(uint inst);
34 void nhw_UARTE_CTS_raised(uint inst);
36 void nhw_UARTE_backend_register(uint inst, struct backend_if *backend);
DNHW_CLOCK.c77 uint inst; member
149 c_el->inst = i; in nhw_clock_init()
181 static void nhw_pwrclk_eval_interrupt(int inst) { in nhw_pwrclk_eval_interrupt() argument
187 struct clkpwr_status *this = &nhw_clkpwr_st[inst]; in nhw_pwrclk_eval_interrupt()
190 if (NRF_CLOCK_regs[inst]->EVENTS_##x \ in nhw_pwrclk_eval_interrupt()
210 if (clock_int_line[inst] == false && new_int_line == true) { in nhw_pwrclk_eval_interrupt()
211 clock_int_line[inst] = true; in nhw_pwrclk_eval_interrupt()
212 hw_irq_ctrl_raise_level_irq_line(nhw_clock_irq_map[inst].cntl_inst, in nhw_pwrclk_eval_interrupt()
213 nhw_clock_irq_map[inst].int_nbr); in nhw_pwrclk_eval_interrupt()
214 } else if (clock_int_line[inst] == true && new_int_line == false) { in nhw_pwrclk_eval_interrupt()
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Dbstest_ticker.c71 static void nhw_bst_ticker_find_next_time(uint inst) { in nhw_bst_ticker_find_next_time() argument
72 struct bs_ticker_status *this = &bs_ticket_st[inst]; in nhw_bst_ticker_find_next_time()
83 void bst_ticker_amp_set_period(uint inst, bs_time_t tick_period) in bst_ticker_amp_set_period() argument
85 struct bs_ticker_status *this = &bs_ticket_st[inst]; in bst_ticker_amp_set_period()
89 nhw_bst_ticker_find_next_time(inst); in bst_ticker_amp_set_period()
95 void bst_ticker_amp_set_next_tick_absolutelute(uint inst, bs_time_t absolute_time) in bst_ticker_amp_set_next_tick_absolutelute() argument
97 bs_ticket_st[inst].ticker_timer_lt = absolute_time; in bst_ticker_amp_set_next_tick_absolutelute()
98 nhw_bst_ticker_find_next_time(inst); in bst_ticker_amp_set_next_tick_absolutelute()
105 void bst_ticker_amp_set_next_tick_delta(uint inst, bs_time_t delta_time) in bst_ticker_amp_set_next_tick_delta() argument
107 bs_ticket_st[inst].ticker_timer_lt = delta_time + nsi_hws_get_time(); in bst_ticker_amp_set_next_tick_delta()
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DNHW_templates.h31 void nhw_##peri##_regw_sideeffects_TASKS_##task(unsigned int inst) { \
34 nhw_##peri##_TASK_##task(inst); \
42 void nhw_##peri##_regw_sideeffects_TASKS_##task(unsigned int inst) { \
45 nhw_##peri##_TASK_##task(inst); \
53 void nhw_##peri##_regw_sideeffects_SUBSCRIBE_##task(unsigned int inst) { \
55 nhw_dppi_common_subscribe_sideeffect(nhw_##peri##_dppi_map[inst], \
57 &task##_subscribed[inst], \
66 void nhw_##peri##_regw_sideeffects_EVENTS_all(unsigned int inst) { \
67 nhw_##peri##_eval_interrupt(inst); \
72 #define _NHW_XPPI_EVENT(peri, peri_regs, inst, event) \ argument
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/nrf_hw_models-latest/src/nrfx/hal/
Dnrf_gpiote.c57 uint inst = gpiote_number_from_ptr(p_reg); in nrf_gpiote_task_trigger() local
59 if ((reg >= &NRF_GPIOTE_regs[inst].TASKS_OUT[0]) in nrf_gpiote_task_trigger()
60 && (reg<= &NRF_GPIOTE_regs[inst].TASKS_OUT[NHW_GPIOTE_MAX_CHANNELS])) { in nrf_gpiote_task_trigger()
61 nrf_gpiote_regw_sideeffects_TASKS_OUT(inst, reg - &NRF_GPIOTE_regs[inst].TASKS_OUT[0]); in nrf_gpiote_task_trigger()
62 } else if ((reg >= &NRF_GPIOTE_regs[inst].TASKS_SET[0]) in nrf_gpiote_task_trigger()
63 && (reg<= &NRF_GPIOTE_regs[inst].TASKS_SET[NHW_GPIOTE_MAX_CHANNELS])) { in nrf_gpiote_task_trigger()
64 nrf_gpiote_regw_sideeffects_TASKS_SET(inst, reg - &NRF_GPIOTE_regs[inst].TASKS_SET[0]); in nrf_gpiote_task_trigger()
65 } else if ((reg >= &NRF_GPIOTE_regs[inst].TASKS_CLR[0]) in nrf_gpiote_task_trigger()
66 && (reg<= &NRF_GPIOTE_regs[inst].TASKS_CLR[NHW_GPIOTE_MAX_CHANNELS])) { in nrf_gpiote_task_trigger()
67 nrf_gpiote_regw_sideeffects_TASKS_CLR(inst, reg - &NRF_GPIOTE_regs[inst].TASKS_CLR[0]); in nrf_gpiote_task_trigger()
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Dnrf_54_aar.c23 int inst = aar_inst_from_ptr(p_reg); in nrf_aar_int_enable() local
25 nhw_AAR_regw_sideeffects_INTENSET(inst); in nrf_aar_int_enable()
30 int inst = aar_inst_from_ptr(p_reg); in nrf_aar_int_disable() local
32 nhw_AAR_regw_sideeffects_INTENCLR(inst); in nrf_aar_int_disable()
37 int inst = aar_inst_from_ptr(p_reg); in nrf_aar_task_trigger() local
40 nhw_AAR_regw_sideeffects_TASKS_START(inst); in nrf_aar_task_trigger()
42 nhw_AAR_regw_sideeffects_TASKS_STOP(inst); in nrf_aar_task_trigger()
44 nhw_CCM_regw_sideeffects_TASKS_RATEOVERRIDE(inst); in nrf_aar_task_trigger()
52 int inst = aar_inst_from_ptr(p_reg); in nrf_aar_enable() local
54 nhw_AARCCM_regw_sideeffects_ENABLE(inst); in nrf_aar_enable()
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Dnrf_54_ccm.c22 int inst = ccm_inst_from_ptr(p_reg); in nrf_ccm_task_trigger() local
26 nhw_CCM_regw_sideeffects_TASKS_START(inst); in nrf_ccm_task_trigger()
28 nhw_CCM_regw_sideeffects_TASKS_STOP(inst); in nrf_ccm_task_trigger()
30 nhw_CCM_regw_sideeffects_TASKS_RATEOVERRIDE(inst); in nrf_ccm_task_trigger()
38 int inst = ccm_inst_from_ptr(p_reg); in nrf_ccm_int_enable() local
40 nhw_CCM_regw_sideeffects_INTENSET(inst); in nrf_ccm_int_enable()
45 int inst = ccm_inst_from_ptr(p_reg); in nrf_ccm_int_disable() local
47 nhw_CCM_regw_sideeffects_INTENCLR(inst); in nrf_ccm_int_disable()
52 int inst = ccm_inst_from_ptr(p_reg); in nrf_ccm_enable() local
54 nhw_AARCCM_regw_sideeffects_ENABLE(inst); in nrf_ccm_enable()
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Dnrf_54_ecb.c20 int inst = ecb_inst_from_ptr(p_reg); in nrf_ecb_task_trigger() local
25 nhw_ECB_regw_sideeffects_TASKS_START(inst); in nrf_ecb_task_trigger()
27 nhw_ECB_regw_sideeffects_TASKS_STOP(inst); in nrf_ecb_task_trigger()
35 int inst = ecb_inst_from_ptr(p_reg); in nrf_ecb_int_enable() local
37 nhw_ECB_regw_sideeffects_INTENSET(inst); in nrf_ecb_int_enable()
42 int inst = ecb_inst_from_ptr(p_reg); in nrf_ecb_int_disable() local
44 nhw_ECB_regw_sideeffects_INTENCLR(inst); in nrf_ecb_int_disable()
49 int inst = ecb_inst_from_ptr(p_reg); in nrf_ecb_event_clear() local
51 nhw_ECB_regw_sideeffects_EVENTS_all(inst); in nrf_ecb_event_clear()
57 int inst = ecb_inst_from_ptr(p_reg); in nrf_ecb_subscribe_common() local
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