1 /* 2 * Copyright (c) 2017 Oticon A/S 3 * Copyright (c) 2023 Nordic Semiconductor ASA 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 #ifndef _NRF_HW_MODEL_SRC_HW_MODELS_IRQ_CTRL_H 9 #define _NRF_HW_MODEL_SRC_HW_MODELS_IRQ_CTRL_H 10 11 #include <stdint.h> 12 #include "NHW_common_types.h" 13 14 #ifdef __cplusplus 15 extern "C" { 16 #endif 17 18 void hw_irq_ctrl_clear_all_irqs(unsigned int inst); 19 void hw_irq_ctrl_clear_irq(unsigned int inst, unsigned int irq); 20 void hw_irq_ctrl_reeval_level_irq(unsigned int inst, unsigned int irq); 21 void nhw_irq_controller_set_irq_mask(unsigned int inst, uint64_t mask); 22 void hw_irq_ctrl_enable_irq(unsigned int inst, unsigned int irq); 23 void hw_irq_ctrl_disable_irq(unsigned int inst, unsigned int irq); 24 int hw_irq_ctrl_set_wake_even_if_lock(unsigned int inst, int value); 25 int hw_irq_ctrl_is_irq_enabled(unsigned int inst, unsigned int irq); 26 int hw_irq_ctrl_is_irq_pending(unsigned int inst, unsigned int irq); 27 void hw_irq_ctrl_raise_im(unsigned int inst, uint32_t irq); 28 void hw_irq_ctrl_set_irq(unsigned int inst, unsigned int irq); 29 void hw_irq_ctrl_raise_level_irq_line(unsigned int inst, unsigned int irq); 30 void hw_irq_ctrl_lower_level_irq_line(unsigned int inst, unsigned int irq); 31 void hw_irq_ctrl_raise_im_from_sw(unsigned int inst, unsigned int irq); 32 uint32_t hw_irq_ctrl_get_current_lock(unsigned int inst); 33 int hw_irq_ctrl_get_highest_prio_irq(unsigned int inst); 34 int hw_irq_ctrl_get_cur_prio(unsigned int inst); 35 void hw_irq_ctrl_set_cur_prio(unsigned int inst, int new); 36 uint8_t hw_irq_ctrl_get_prio(unsigned int inst, unsigned int irq); 37 void hw_irq_ctrl_prio_set(unsigned int inst, unsigned int irq, unsigned int prio); 38 uint32_t hw_irq_ctrl_change_lock(unsigned int inst, uint32_t new_lock); 39 const char *hw_irq_ctrl_get_name(unsigned int inst, unsigned int irq); 40 void hw_irq_ctrl_toggle_level_irq_line_if(bool *int_line, 41 bool new_int_line, 42 struct nhw_irq_mapping *irq_map); 43 44 /* 45 * This interrupt will awake the CPU if IRQs are not locked, 46 * This interrupt does not have an associated status bit or handler 47 */ 48 #define PHONY_WEAK_IRQ 0xFFFE 49 /* 50 * This interrupt will awake the CPU even if IRQs are locked, 51 * This interrupt does not have an associated status bit or handler 52 * (the lock is only ignored when the interrupt is raised from the HW models, 53 * SW threads should not try to use this) 54 */ 55 #define PHONY_HARD_IRQ 0xFFFF 56 57 #ifdef __cplusplus 58 } 59 #endif 60 61 #endif /* _NRF_HW_MODEL_SRC_HW_MODELS_IRQ_CTRL_H */ 62
