Lines Matching refs:inst
112 static void nhw_UARTE_signal_EVENTS_ERROR(unsigned int inst);
113 static void nhw_UARTE_signal_EVENTS_RXDRDY(unsigned int inst);
114 static void nhw_UARTE_signal_EVENTS_RXTO(unsigned int inst);
115 static void nhw_UARTE_signal_EVENTS_TXDRDY(unsigned int inst);
116 static void nhw_UARTE_signal_EVENTS_CTS(unsigned int inst);
117 static void nhw_UARTE_signal_EVENTS_NCTS(unsigned int inst);
118 static void nhw_UARTE_signal_EVENTS_TXSTARTED(unsigned int inst);
119 static void nhw_UARTE_signal_EVENTS_TXSTOPPED(unsigned int inst);
120 static void nhw_UARTE_signal_EVENTS_ENDTX(unsigned int inst);
121 static void nhw_UARTE_signal_EVENTS_RXSTARTED(unsigned int inst);
122 static void nhw_UARTE_signal_EVENTS_ENDRX(unsigned int inst);
124 static void nhw_UARTE_signal_EVENTS_FRAMETIMEOUT(unsigned int inst);
127 static void nhw_UARTE_signal_EVENTS_DMA_RX_MATCH(unsigned int inst, unsigned int i);
129 static void nhw_UARTE_Tx_send_byte(unsigned int inst, struct uarte_status *u_el);
130 static void nhw_UART_Tx_queue_byte(uint inst, struct uarte_status *u_el, uint16_t byte);
131 static void nhw_UARTE_Rx_DMA_attempt(uint inst, struct uarte_status *u_el);
132 static void raise_RTS_R(uint inst, struct uarte_status *u_el);
149 u_el->inst = i; in nhw_uarte_init()
226 uart_rtxb_cb_f nhw_uarte_register_rx_cb(int inst, uart_rtxb_cb_f cb, bool Rx_NotTx) { in nhw_uarte_register_rx_cb() argument
227 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_uarte_register_rx_cb()
236 void nhw_UARTE_backend_register(uint inst, struct backend_if *backend) { in nhw_UARTE_backend_register() argument
237 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_backend_register()
240 bs_trace_warning_line("UART%i backend selection overwritten\n", inst); in nhw_UARTE_backend_register()
263 static bool uart_enabled(uint inst) { in uart_enabled() argument
265 return NRF_UARTE_regs[inst].ENABLE == 4; in uart_enabled()
267 (void) inst; in uart_enabled()
272 static bool uarte_enabled(uint inst) { in uarte_enabled() argument
273 return NRF_UARTE_regs[inst].ENABLE == 8; in uarte_enabled()
290 static inline bs_time_t nhw_uarte_nbits_time(uint inst, uint nbits) { in nhw_uarte_nbits_time() argument
292 …return nbits * nhw_uarte_bit_dur_from_reg(NRF_UARTE_regs[inst].BAUDRATE, nhw_uarte_st[inst].clock_… in nhw_uarte_nbits_time()
295 static int nhw_uarte_get_frame_size(uint inst) { in nhw_uarte_get_frame_size() argument
298 …frame_size = (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_FRAMESIZE_Msk) >> UARTE_CONFIG_FRAMESIZE_… in nhw_uarte_get_frame_size()
303 (void) inst; in nhw_uarte_get_frame_size()
313 bs_time_t nhw_uarte_one_byte_time(uint inst) { in nhw_uarte_one_byte_time() argument
315 uint32_t CONFIG = NRF_UARTE_regs[inst].CONFIG; in nhw_uarte_one_byte_time()
317 duration += nhw_uarte_get_frame_size(inst); /* data byte itself */ in nhw_uarte_one_byte_time()
326 return nhw_uarte_nbits_time(inst, duration); in nhw_uarte_one_byte_time()
329 static uint8_t Rx_FIFO_pop(uint inst, struct uarte_status *u_el) { in Rx_FIFO_pop() argument
333 bs_trace_warning_time_line("UART%i: Attempted empty Rx FIFO pop\n", inst); in Rx_FIFO_pop()
346 NRF_UART_regs[inst]->RXD = u_el->Rx_FIFO[0]; in Rx_FIFO_pop()
348 nhw_UARTE_signal_EVENTS_RXDRDY(inst); in Rx_FIFO_pop()
354 static void Rx_FIFO_push(uint inst, struct uarte_status *u_el, uint8_t value) { in Rx_FIFO_push() argument
356 Rx_FIFO_pop(inst, u_el); in Rx_FIFO_push()
357 bs_trace_warning_time_line("UART%i: Pushed to full Rx FIFO, oldest value dropped\n", inst); in Rx_FIFO_push()
358 NRF_UARTE_regs[inst].ERRORSRC |= UARTE_ERRORSRC_OVERRUN_Msk; in Rx_FIFO_push()
359 nhw_UARTE_signal_EVENTS_ERROR(inst); in Rx_FIFO_push()
365 NRF_UART_regs[inst]->RXD = u_el->Rx_FIFO[0]; in Rx_FIFO_push()
367 nhw_UARTE_signal_EVENTS_RXDRDY(inst); in Rx_FIFO_push()
371 static void nhw_UARTE_Rx_DMA_end(uint inst, struct uarte_status * u_el) { in nhw_UARTE_Rx_DMA_end() argument
374 NRF_UARTE_regs[inst].DMA.RX.AMOUNT = u_el->RXD_AMOUNT; in nhw_UARTE_Rx_DMA_end()
376 NRF_UARTE_regs[inst].RXD.AMOUNT = u_el->RXD_AMOUNT; in nhw_UARTE_Rx_DMA_end()
378 nhw_UARTE_signal_EVENTS_ENDRX(inst); in nhw_UARTE_Rx_DMA_end()
381 static void nhw_UARTE_Rx_match_check(uint inst, struct uarte_status * u_el, uint32_t value) { in nhw_UARTE_Rx_match_check() argument
385 if ((NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG & enable_mask) in nhw_UARTE_Rx_match_check()
386 && (NRF_UARTE_regs[inst].DMA.RX.MATCH.CANDIDATE[i] == value)) { in nhw_UARTE_Rx_match_check()
387 NRF_UARTE_regs[inst].DMA.RX.AMOUNT = u_el->RXD_AMOUNT; in nhw_UARTE_Rx_match_check()
388 NRF_UARTE_regs[inst].DMA.TX.AMOUNT = u_el->TXD_AMOUNT; in nhw_UARTE_Rx_match_check()
389 nhw_uarte_st[inst].MATCH_CANDIDATE[i] = NRF_UARTE_regs[i].DMA.RX.MATCH.CANDIDATE[i]; in nhw_UARTE_Rx_match_check()
391 … if (NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG & (UARTE_DMA_RX_MATCH_CONFIG_ONESHOT0_Msk << i)) { in nhw_UARTE_Rx_match_check()
392 NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG &= ~enable_mask; in nhw_UARTE_Rx_match_check()
394 nhw_UARTE_signal_EVENTS_DMA_RX_MATCH(inst, i); in nhw_UARTE_Rx_match_check()
398 (void) inst; in nhw_UARTE_Rx_match_check()
404 static void nhw_UARTE_Rx_DMA_attempt(uint inst, struct uarte_status * u_el) { in nhw_UARTE_Rx_DMA_attempt() argument
412 uint8_t value = Rx_FIFO_pop(inst, u_el); in nhw_UARTE_Rx_DMA_attempt()
415 nhw_UARTE_Rx_match_check(inst, u_el, value); in nhw_UARTE_Rx_DMA_attempt()
418 nhw_UARTE_Rx_DMA_end(inst, u_el); in nhw_UARTE_Rx_DMA_attempt()
422 static bool flow_control_on(uint inst) { in flow_control_on() argument
423 return (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_HWFC_Msk) != 0; in flow_control_on()
426 static void propagate_RTS_R(uint inst, struct uarte_status *u_el) { in propagate_RTS_R() argument
427 if (flow_control_on(inst)) { in propagate_RTS_R()
429 u_el->backend.RTS_pin_toggle_f(inst, u_el->RTSR); in propagate_RTS_R()
434 static void lower_RTS_R(uint inst, struct uarte_status *u_el) { in lower_RTS_R() argument
439 propagate_RTS_R(inst, u_el); in lower_RTS_R()
442 static void raise_RTS_R(uint inst, struct uarte_status *u_el) { in raise_RTS_R() argument
447 propagate_RTS_R(inst, u_el); in raise_RTS_R()
450 static void notify_backend_RxOnOff(uint inst, struct uarte_status *u_el, bool OnNotOff) { in notify_backend_RxOnOff() argument
452 u_el->backend.uart_enable_notify_f(inst, u_el->tx_status != Tx_Off, OnNotOff); in notify_backend_RxOnOff()
456 static void notify_backend_TxOnOff(uint inst, struct uarte_status *u_el, bool OnNotOff) { in notify_backend_TxOnOff() argument
458 u_el->backend.uart_enable_notify_f(inst, OnNotOff, u_el->rx_status != Rx_Off); in notify_backend_TxOnOff()
469 static bool nhw_UARTE_process_Rx_byte(uint inst, struct uarte_status *u_el, uint16_t *byte) { in nhw_UARTE_process_Rx_byte() argument
471 uint frame_size = nhw_uarte_get_frame_size(inst); in nhw_UARTE_process_Rx_byte()
476 if (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_ENDIAN_Msk) { //Cut from LSB in nhw_UARTE_process_Rx_byte()
482 if ((*byte & 0xFF) == NRF_UARTE_regs[inst].ADDRESS) { in nhw_UARTE_process_Rx_byte()
492 (void) inst; in nhw_UARTE_process_Rx_byte()
503 void nhw_UARTE_digest_Rx_byte(uint inst, uint16_t byte) { in nhw_UARTE_digest_Rx_byte() argument
504 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_digest_Rx_byte()
511 …ved while UART%i is not enabled for Rx, ignoring it (warn count = %i)\n", inst, Received_error_cou… in nhw_UARTE_digest_Rx_byte()
513 bs_trace_warning_time_line("Silencing this warning the next 252 times\n", inst); in nhw_UARTE_digest_Rx_byte()
520 frame_start = now - nhw_uarte_one_byte_time(inst) + 1; in nhw_UARTE_digest_Rx_byte()
524 … "this would have likely caused a framing error. Ignoring it in the model\n", inst); in nhw_UARTE_digest_Rx_byte()
533 u_el->trx_callbacks[1](inst, &byte); in nhw_UARTE_digest_Rx_byte()
536 if (nhw_UARTE_process_Rx_byte(inst, u_el, &byte)) { in nhw_UARTE_digest_Rx_byte()
540 Rx_FIFO_push(inst, u_el, byte); in nhw_UARTE_digest_Rx_byte()
541 nhw_UARTE_Rx_DMA_attempt(inst, u_el); in nhw_UARTE_digest_Rx_byte()
543 raise_RTS_R(inst, u_el); in nhw_UARTE_digest_Rx_byte()
550 void nhw_UARTE_CTS_lowered(uint inst) { in nhw_UARTE_CTS_lowered() argument
551 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_CTS_lowered()
560 if ( !(uart_enabled(inst) || uarte_enabled(inst)) ) { in nhw_UARTE_CTS_lowered()
565 nhw_UARTE_Tx_send_byte(inst, u_el); in nhw_UARTE_CTS_lowered()
567 nhw_UARTE_signal_EVENTS_CTS(inst); in nhw_UARTE_CTS_lowered()
573 void nhw_UARTE_CTS_raised(uint inst) { in nhw_UARTE_CTS_raised() argument
574 if (nhw_uarte_st[inst].CTS_blocking == true) { in nhw_UARTE_CTS_raised()
577 nhw_uarte_st[inst].CTS_blocking = true; in nhw_UARTE_CTS_raised()
579 if ( !(uart_enabled(inst) || uarte_enabled(inst)) ) { in nhw_UARTE_CTS_raised()
582 nhw_UARTE_signal_EVENTS_NCTS(inst); in nhw_UARTE_CTS_raised()
585 static void nhw_UARTE_eval_interrupt(uint inst) { in nhw_UARTE_eval_interrupt() argument
590 uint32_t inten = NRF_UARTE_regs[inst].INTEN; in nhw_UARTE_eval_interrupt()
592 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., CTS, inten) in nhw_UARTE_eval_interrupt()
593 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., NCTS, inten) in nhw_UARTE_eval_interrupt()
594 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., RXDRDY, inten) in nhw_UARTE_eval_interrupt()
595 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., TXDRDY, inten) in nhw_UARTE_eval_interrupt()
596 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., ERROR, inten) in nhw_UARTE_eval_interrupt()
597 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., RXTO, inten) in nhw_UARTE_eval_interrupt()
599 if (uarte_enabled(inst)) { in nhw_UARTE_eval_interrupt()
603 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., ENDRX, inten) in nhw_UARTE_eval_interrupt()
604 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., ENDTX, inten) in nhw_UARTE_eval_interrupt()
605 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., RXSTARTED, inten) in nhw_UARTE_eval_interrupt()
606 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., TXSTARTED, inten) in nhw_UARTE_eval_interrupt()
608 NHW_CHECK_INTERRUPT_ST(UARTE, NRF_UARTE_regs[inst]., DMA.RX.END, DMARXEND, inten) in nhw_UARTE_eval_interrupt()
609 NHW_CHECK_INTERRUPT_ST(UARTE, NRF_UARTE_regs[inst]., DMA.TX.END, DMATXEND, inten) in nhw_UARTE_eval_interrupt()
610 NHW_CHECK_INTERRUPT_ST(UARTE, NRF_UARTE_regs[inst]., DMA.RX.READY, DMARXREADY, inten) in nhw_UARTE_eval_interrupt()
611 NHW_CHECK_INTERRUPT_ST(UARTE, NRF_UARTE_regs[inst]., DMA.TX.READY, DMATXREADY, inten) in nhw_UARTE_eval_interrupt()
613 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., TXSTOPPED, inten) in nhw_UARTE_eval_interrupt()
615 NHW_CHECK_INTERRUPT(UARTE, NRF_UARTE_regs[inst]., FRAMETIMEOUT, inten) in nhw_UARTE_eval_interrupt()
618 for (int i = 0; i < nhw_uarte_st[inst].n_match; i++) { in nhw_UARTE_eval_interrupt()
619 if (NRF_UARTE_regs[inst].EVENTS_DMA.RX.MATCH[i] && in nhw_UARTE_eval_interrupt()
627 hw_irq_ctrl_toggle_level_irq_line_if(&uart_int_line[inst], in nhw_UARTE_eval_interrupt()
629 &nhw_uart_irq_map[inst]); in nhw_UARTE_eval_interrupt()
632 static void nhw_UARTE_RxDMA_start(int inst) { in nhw_UARTE_RxDMA_start() argument
633 struct uarte_status * u_el = &nhw_uarte_st[inst]; in nhw_UARTE_RxDMA_start()
635 u_el->RXD_PTR = NRF_UARTE_regs[inst].RXD.PTR; in nhw_UARTE_RxDMA_start()
636 u_el->RXD_MAXCNT = NRF_UARTE_regs[inst].RXD.MAXCNT; in nhw_UARTE_RxDMA_start()
638 u_el->RXD_PTR = NRF_UARTE_regs[inst].DMA.RX.PTR; in nhw_UARTE_RxDMA_start()
639 u_el->RXD_MAXCNT = NRF_UARTE_regs[inst].DMA.RX.MAXCNT; in nhw_UARTE_RxDMA_start()
648 nhw_UARTE_signal_EVENTS_RXSTARTED(inst); /* Instantaneously ready */ in nhw_UARTE_RxDMA_start()
650 nhw_UARTE_Rx_DMA_attempt(inst, u_el); in nhw_UARTE_RxDMA_start()
653 void nhw_UARTE_TASK_STARTRX(uint inst) in nhw_UARTE_TASK_STARTRX() argument
655 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_TASK_STARTRX()
657 if (!uart_enabled(inst) && !uarte_enabled(inst)) { in nhw_UARTE_TASK_STARTRX()
659 "Ignoring it.\n", inst, NRF_UARTE_regs[inst].ENABLE); in nhw_UARTE_TASK_STARTRX()
663 if (uart_enabled(inst) && (u_el->rx_status != Rx_Off)) { in nhw_UARTE_TASK_STARTRX()
665 "Ignoring it\n", inst, u_el->rx_status); in nhw_UARTE_TASK_STARTRX()
672 "Ignoring it\n", inst); in nhw_UARTE_TASK_STARTRX()
683 if (uarte_enabled(inst)) { in nhw_UARTE_TASK_STARTRX()
684 nhw_UARTE_RxDMA_start(inst); in nhw_UARTE_TASK_STARTRX()
690 notify_backend_RxOnOff(inst, u_el, true); in nhw_UARTE_TASK_STARTRX()
694 lower_RTS_R(inst, u_el); in nhw_UARTE_TASK_STARTRX()
698 void nhw_UARTE_TASK_STOPRX(uint inst) in nhw_UARTE_TASK_STOPRX() argument
704 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_TASK_STOPRX()
707 bs_trace_warning_time_line("UART%i Rx stopped while already stopped => ignored\n", inst); in nhw_UARTE_TASK_STOPRX()
711 bs_trace_warning_time_line("UART%i Rx stopped while already stopping => ignored\n", inst); in nhw_UARTE_TASK_STOPRX()
715 raise_RTS_R(inst, u_el); in nhw_UARTE_TASK_STOPRX()
718 u_el->Rx_TO_timer = nsi_hws_get_time() + 5*nhw_uarte_one_byte_time(inst); in nhw_UARTE_TASK_STOPRX()
726 void nhw_UARTE_TASK_DMA_RX_ENABLEMATCH(uint inst, uint i) { in nhw_UARTE_TASK_DMA_RX_ENABLEMATCH() argument
727 NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG |= UARTE_DMA_RX_MATCH_CONFIG_ENABLE0_Msk<<i; in nhw_UARTE_TASK_DMA_RX_ENABLEMATCH()
729 void nhw_UARTE_TASK_DMA_RX_DISABLEMATCH(uint inst, uint i) { in nhw_UARTE_TASK_DMA_RX_DISABLEMATCH() argument
730 NRF_UARTE_regs[inst].DMA.RX.MATCH.CONFIG &= ~(UARTE_DMA_RX_MATCH_CONFIG_ENABLE0_Msk<<i); in nhw_UARTE_TASK_DMA_RX_DISABLEMATCH()
734 static void nHW_UARTE_Tx_DMA_end(int inst, struct uarte_status * u_el) { in nHW_UARTE_Tx_DMA_end() argument
737 NRF_UARTE_regs[inst].TXD.AMOUNT = u_el->TXD_AMOUNT; in nHW_UARTE_Tx_DMA_end()
739 NRF_UARTE_regs[inst].DMA.TX.AMOUNT = u_el->TXD_AMOUNT; in nHW_UARTE_Tx_DMA_end()
741 nhw_UARTE_signal_EVENTS_ENDTX(inst); in nHW_UARTE_Tx_DMA_end()
744 static uint16_t nhw_UART_prep_Tx_data(uint inst, struct uarte_status *u_el, uint16_t byte) { in nhw_UART_prep_Tx_data() argument
746 uint frame_size = nhw_uarte_get_frame_size(inst); in nhw_UART_prep_Tx_data()
752 if (NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_ENDIAN_Msk) { //Cut from LSB in nhw_UART_prep_Tx_data()
765 (void) inst; in nhw_UART_prep_Tx_data()
771 static void nHW_UARTE_Tx_DMA_byte(int inst, struct uarte_status *u_el) in nHW_UARTE_Tx_DMA_byte() argument
775 uint16_t data = nhw_UART_prep_Tx_data(inst, u_el, *ptr); in nHW_UARTE_Tx_DMA_byte()
777 nhw_UART_Tx_queue_byte(inst, u_el, data); in nHW_UARTE_Tx_DMA_byte()
780 void nhw_UARTE_TASK_STARTTX(uint inst) in nhw_UARTE_TASK_STARTTX() argument
782 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_TASK_STARTTX()
784 if (!uart_enabled(inst) && !uarte_enabled(inst)) { in nhw_UARTE_TASK_STARTTX()
786 "Ignoring it.\n", inst, NRF_UARTE_regs[inst].ENABLE); in nhw_UARTE_TASK_STARTTX()
793 "Ignoring it\n", inst); in nhw_UARTE_TASK_STARTTX()
799 notify_backend_TxOnOff(inst, u_el, true); in nhw_UARTE_TASK_STARTTX()
806 if (uarte_enabled(inst)) { in nhw_UARTE_TASK_STARTTX()
808 u_el->TXD_PTR = NRF_UARTE_regs[inst].TXD.PTR; in nhw_UARTE_TASK_STARTTX()
809 u_el->TXD_MAXCNT = NRF_UARTE_regs[inst].TXD.MAXCNT; in nhw_UARTE_TASK_STARTTX()
811 u_el->TXD_PTR = NRF_UARTE_regs[inst].DMA.TX.PTR; in nhw_UARTE_TASK_STARTTX()
812 u_el->TXD_MAXCNT = NRF_UARTE_regs[inst].DMA.TX.MAXCNT; in nhw_UARTE_TASK_STARTTX()
816 nhw_UARTE_signal_EVENTS_TXSTARTED(inst); /* Instantaneously ready */ in nhw_UARTE_TASK_STARTTX()
819 nHW_UARTE_Tx_DMA_byte(inst, u_el); in nhw_UARTE_TASK_STARTTX()
822 nHW_UARTE_Tx_DMA_end(inst, u_el); in nhw_UARTE_TASK_STARTTX()
827 static void nhw_UARTE_tx_final_stop(int inst, struct uarte_status *u_el) { in nhw_UARTE_tx_final_stop() argument
829 notify_backend_TxOnOff(inst, u_el, false); in nhw_UARTE_tx_final_stop()
831 if (uarte_enabled(inst)) { in nhw_UARTE_tx_final_stop()
833 nHW_UARTE_Tx_DMA_end(inst, u_el); in nhw_UARTE_tx_final_stop()
835 nhw_UARTE_signal_EVENTS_TXSTOPPED(inst); in nhw_UARTE_tx_final_stop()
839 void nhw_UARTE_TASK_STOPTX(uint inst) in nhw_UARTE_TASK_STOPTX() argument
841 struct uarte_status * u_el = &nhw_uarte_st[inst]; in nhw_UARTE_TASK_STOPTX()
844 if (uart_enabled(inst)) { in nhw_UARTE_TASK_STOPTX()
846 bs_trace_warning_time_line("UART%i Tx stopped while not idle\n", inst); in nhw_UARTE_TASK_STOPTX()
849 nhw_UARTE_tx_final_stop(inst, u_el); in nhw_UARTE_TASK_STOPTX()
857 nhw_UARTE_tx_final_stop(inst, u_el); in nhw_UARTE_TASK_STOPTX()
861 if (uarte_enabled(inst)) { in nhw_UARTE_TASK_STOPTX()
865 bs_trace_info(3, "UART%i STOPTX received while already stopping, ignored\n", inst); in nhw_UARTE_TASK_STOPTX()
868 nhw_UARTE_tx_final_stop(inst, u_el); in nhw_UARTE_TASK_STOPTX()
876 static void nhw_UARTE_Tx_byte(unsigned int inst, struct uarte_status *u_el, uint16_t data) { in nhw_UARTE_Tx_byte() argument
878 u_el->trx_callbacks[0](inst, &data); in nhw_UARTE_Tx_byte()
881 u_el->backend.tx_byte_f(inst, data); in nhw_UARTE_Tx_byte()
891 static void nhw_UARTE_Tx_send_byte(unsigned int inst, struct uarte_status *u_el) { in nhw_UARTE_Tx_send_byte() argument
892 nhw_UARTE_Tx_byte(inst, u_el, u_el->Tx_byte); in nhw_UARTE_Tx_send_byte()
893 u_el->Tx_byte_done_timer = nsi_hws_get_time() + nhw_uarte_one_byte_time(inst); in nhw_UARTE_Tx_send_byte()
900 nHW_UARTE_Tx_DMA_end(inst, u_el); in nhw_UARTE_Tx_send_byte()
908 static void nhw_UART_Tx_queue_byte(uint inst, struct uarte_status *u_el, uint16_t byte) in nhw_UART_Tx_queue_byte() argument
912 "This should not have happened\n", inst); in nhw_UART_Tx_queue_byte()
924 if ((flow_control_on(inst) == false) || (u_el->CTS_blocking == false)) { in nhw_UART_Tx_queue_byte()
925 nhw_UARTE_Tx_send_byte(inst, u_el); in nhw_UART_Tx_queue_byte()
932 static void nhw_uart_maybe_program_frametimeout(int inst) { in nhw_uart_maybe_program_frametimeout() argument
933 if (!(NRF_UARTE_regs[inst].CONFIG & UARTE_CONFIG_FRAMETIMEOUT_Msk)) { in nhw_uart_maybe_program_frametimeout()
937 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_uart_maybe_program_frametimeout()
940 nhw_uarte_nbits_time(inst, NRF_UARTE_regs[inst].FRAMETIMEOUT); in nhw_uart_maybe_program_frametimeout()
947 static void nhw_uart_frametimeout_timer_triggered(int inst, struct uarte_status *u_el) in nhw_uart_frametimeout_timer_triggered() argument
950 nhw_UARTE_signal_EVENTS_FRAMETIMEOUT(inst); in nhw_uart_frametimeout_timer_triggered()
957 static void nhw_uart_Rx_TO_timer_triggered(int inst, struct uarte_status *u_el) in nhw_uart_Rx_TO_timer_triggered() argument
965 nhw_UARTE_Rx_DMA_end(inst, u_el); in nhw_uart_Rx_TO_timer_triggered()
970 nhw_UARTE_signal_EVENTS_RXTO(inst); in nhw_uart_Rx_TO_timer_triggered()
971 notify_backend_RxOnOff(inst, u_el, false); in nhw_uart_Rx_TO_timer_triggered()
975 static void nhw_uart_Tx_byte_done_timer_triggered(int inst, struct uarte_status *u_el) in nhw_uart_Tx_byte_done_timer_triggered() argument
978 nhw_UARTE_signal_EVENTS_TXDRDY(inst); in nhw_uart_Tx_byte_done_timer_triggered()
984 nhw_UARTE_tx_final_stop(inst, u_el); in nhw_uart_Tx_byte_done_timer_triggered()
989 nHW_UARTE_Tx_DMA_byte(inst, u_el); in nhw_uart_Tx_byte_done_timer_triggered()
997 for (int inst = 0; inst < NHW_UARTE_TOTAL_INST; inst++) { in nhw_uart_timer_triggered() local
998 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_uart_timer_triggered()
1002 nhw_uart_frametimeout_timer_triggered(inst, u_el); in nhw_uart_timer_triggered()
1006 nhw_uart_Rx_TO_timer_triggered(inst, u_el); in nhw_uart_timer_triggered()
1009 nhw_uart_Tx_byte_done_timer_triggered(inst, u_el); in nhw_uart_timer_triggered()
1029 void nhw_UARTE_TASK_FLUSHRX(uint inst) { in nhw_UARTE_TASK_FLUSHRX() argument
1030 if (!uarte_enabled(inst)) { in nhw_UARTE_TASK_FLUSHRX()
1032 inst); in nhw_UARTE_TASK_FLUSHRX()
1036 struct uarte_status * u_el = &nhw_uarte_st[inst]; in nhw_UARTE_TASK_FLUSHRX()
1040 nhw_UARTE_RxDMA_start(inst); in nhw_UARTE_TASK_FLUSHRX()
1044 nhw_UARTE_Rx_DMA_end(inst, u_el); in nhw_UARTE_TASK_FLUSHRX()
1049 void nhw_UARTE_TASK_SUSPEND(uint inst) { in nhw_UARTE_TASK_SUSPEND() argument
1051 nhw_UARTE_TASK_STOPTX(inst); in nhw_UARTE_TASK_SUSPEND()
1052 nhw_UARTE_TASK_STOPRX(inst); in nhw_UARTE_TASK_SUSPEND()
1056 void nhw_UARTE_regw_sideeffects_ENABLE(unsigned int inst) { in nhw_UARTE_regw_sideeffects_ENABLE() argument
1057 struct uarte_status * u_el = &nhw_uarte_st[inst]; in nhw_UARTE_regw_sideeffects_ENABLE()
1059 if (NRF_UARTE_regs[inst].ENABLE != 0) { in nhw_UARTE_regw_sideeffects_ENABLE()
1060 propagate_RTS_R(inst, u_el); in nhw_UARTE_regw_sideeffects_ENABLE()
1065 … bs_trace_warning_time_line("UART%i disabled while Tx was not Off (%i)\n", inst, u_el->tx_status); in nhw_UARTE_regw_sideeffects_ENABLE()
1068 … bs_trace_warning_time_line("UART%i disabled while Rx was not Off (%i)\n", inst, u_el->rx_status); in nhw_UARTE_regw_sideeffects_ENABLE()
1072 …race_warning_time_line("UART%i disabled while Rx was shutting Off. Events will be missed\n", inst); in nhw_UARTE_regw_sideeffects_ENABLE()
1075 …s_trace_warning_time_line("UART%i disabled while Tx was mid frame. Events will be missed\n", inst); in nhw_UARTE_regw_sideeffects_ENABLE()
1088 …ARTE%i disabled while Tx DMA was not Off. DMA interrupted mid way, ENDTX will be missing\n", inst); in nhw_UARTE_regw_sideeffects_ENABLE()
1091 …ARTE%i disabled while Rx DMA was not Off. DMA interrupted mid way, ENDRX will be missing\n", inst); in nhw_UARTE_regw_sideeffects_ENABLE()
1097 notify_backend_RxOnOff(inst, u_el, false); in nhw_UARTE_regw_sideeffects_ENABLE()
1100 void nhw_UARTE_regw_sideeffects_CONFIG(unsigned int inst) { in nhw_UARTE_regw_sideeffects_CONFIG() argument
1102 uint frame_size = nhw_uarte_get_frame_size(inst); in nhw_UARTE_regw_sideeffects_CONFIG()
1103 NRF_UARTE_regs[inst].CONFIG &= ~UARTE_CONFIG_FRAMESIZE_Msk; in nhw_UARTE_regw_sideeffects_CONFIG()
1104 NRF_UARTE_regs[inst].CONFIG |= frame_size << UARTE_CONFIG_FRAMESIZE_Pos; in nhw_UARTE_regw_sideeffects_CONFIG()
1106 if (NRF_UARTE_regs[inst].ENABLE != 0) { in nhw_UARTE_regw_sideeffects_CONFIG()
1107 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_regw_sideeffects_CONFIG()
1108 propagate_RTS_R(inst, u_el); in nhw_UARTE_regw_sideeffects_CONFIG()
1112 uint32_t nhw_UARTE_regr_sideeffects_ERRORSRC(unsigned int inst) { in nhw_UARTE_regr_sideeffects_ERRORSRC() argument
1113 uint32_t value = NRF_UARTE_regs[inst].ERRORSRC; in nhw_UARTE_regr_sideeffects_ERRORSRC()
1114 NRF_UARTE_regs[inst].ERRORSRC = 0; in nhw_UARTE_regr_sideeffects_ERRORSRC()
1118 void nhw_UARTE_regw_sideeffects_ERRORSRC(unsigned int inst) { in nhw_UARTE_regw_sideeffects_ERRORSRC() argument
1119 NRF_UARTE_regs[inst].ERRORSRC = 0; in nhw_UARTE_regw_sideeffects_ERRORSRC()
1123 uint32_t nhw_UARTE_regr_sideeffects_RXD(unsigned int inst) { in nhw_UARTE_regr_sideeffects_RXD() argument
1124 if (!uart_enabled(inst)) { in nhw_UARTE_regr_sideeffects_RXD()
1125 bs_trace_warning("RXD read while UART%i was not enabled\n", inst); in nhw_UARTE_regr_sideeffects_RXD()
1136 struct uarte_status * u_el = &nhw_uarte_st[inst]; in nhw_UARTE_regr_sideeffects_RXD()
1139 bs_trace_warning("UART%i: Reading RXD without any new data there\n", inst); in nhw_UARTE_regr_sideeffects_RXD()
1140 return NRF_UART_regs[inst]->RXD; in nhw_UARTE_regr_sideeffects_RXD()
1143 value = Rx_FIFO_pop(inst, u_el); in nhw_UARTE_regr_sideeffects_RXD()
1147 lower_RTS_R(inst, u_el); in nhw_UARTE_regr_sideeffects_RXD()
1153 void nhw_UARTE_regw_sideeffects_TXD(unsigned int inst) in nhw_UARTE_regw_sideeffects_TXD() argument
1155 if (!uart_enabled(inst)) { in nhw_UARTE_regw_sideeffects_TXD()
1156 bs_trace_warning("TXD written while UART%i was not enabled (in non-E mode)\n", inst); in nhw_UARTE_regw_sideeffects_TXD()
1164 struct uarte_status *u_el = &nhw_uarte_st[inst]; in nhw_UARTE_regw_sideeffects_TXD()
1167 bs_trace_warning("UART%i.TXD written but it was Tx was not started => ignoring\n", inst); in nhw_UARTE_regw_sideeffects_TXD()
1171 …trace_warning("UART%i.TXD written but a transmission is currently ongoing => ignoring it\n", inst); in nhw_UARTE_regw_sideeffects_TXD()
1175 nhw_UART_Tx_queue_byte(inst, u_el, NRF_UART_regs[inst]->TXD); in nhw_UARTE_regw_sideeffects_TXD()
1180 #define _NHW_UARTE_XPPI_EVENT(inst, event, eventl) \ argument
1181 if (inst == 0) { \
1187 #define _NHW_UARTE_XPPI_EVENT(inst, event, eventl) \ argument
1188 nhw_dppi_event_signal_if(nhw_uarte_st[inst].dppi_map, \
1189 NRF_UARTE_regs[inst].PUBLISH_##eventl)
1194 NRF_UARTE_regs[inst].EVENTS_##eventl = 1; \
1195 nhw_UARTE_eval_interrupt(inst); \
1196 _NHW_UARTE_XPPI_EVENT(inst, event, eventl); \
1200 static void nhw_UARTE_signal_EVENTS_##event(unsigned int inst) \
1204 static void nhw_UARTE_signal_EVENTS_##event##_noshort(unsigned int inst) \
1229 static void nhw_UARTE_signal_EVENTS_CTS(unsigned int inst) { in NHW_UARTE_SIGNAL_EVENT_ns()
1232 if (uart_enabled(inst)) { //Only in UART mode in NHW_UARTE_SIGNAL_EVENT_ns()
1233 NHW_SHORT(UARTE, inst, NRF_UARTE_regs[inst]., CTS, STARTRX) in NHW_UARTE_SIGNAL_EVENT_ns()
1236 nhw_UARTE_signal_EVENTS_CTS_noshort(inst); in NHW_UARTE_SIGNAL_EVENT_ns()
1239 static void nhw_UARTE_signal_EVENTS_NCTS(unsigned int inst) { in nhw_UARTE_signal_EVENTS_NCTS() argument
1242 if (uart_enabled(inst)) { //Only in UART mode in nhw_UARTE_signal_EVENTS_NCTS()
1243 NHW_SHORT(UARTE, inst, NRF_UARTE_regs[inst]., NCTS, STOPRX) in nhw_UARTE_signal_EVENTS_NCTS()
1246 nhw_UARTE_signal_EVENTS_NCTS_noshort(inst); in nhw_UARTE_signal_EVENTS_NCTS()
1249 static void nhw_UARTE_signal_EVENTS_RXDRDY(unsigned int inst) { in nhw_UARTE_signal_EVENTS_RXDRDY() argument
1251 nhw_uart_maybe_program_frametimeout(inst); in nhw_UARTE_signal_EVENTS_RXDRDY()
1253 nhw_UARTE_signal_EVENTS_RXDRDY_noshort(inst); in nhw_UARTE_signal_EVENTS_RXDRDY()
1256 static void nhw_UARTE_signal_EVENTS_ENDRX(unsigned int inst) { in nhw_UARTE_signal_EVENTS_ENDRX() argument
1257 if (uarte_enabled(inst)) { //Only in UART-E mode in nhw_UARTE_signal_EVENTS_ENDRX()
1259 NHW_SHORT(UARTE, inst, NRF_UARTE_regs[inst]., ENDRX, STARTRX) in nhw_UARTE_signal_EVENTS_ENDRX()
1260 NHW_SHORT(UARTE, inst, NRF_UARTE_regs[inst]., ENDRX, STOPRX) in nhw_UARTE_signal_EVENTS_ENDRX()
1262 NHW_SHORT_ST(UARTE, inst, NRF_UARTE_regs[inst]., DMA_RX_END, STARTRX, DMA_RX_START) in nhw_UARTE_signal_EVENTS_ENDRX()
1263 NHW_SHORT_ST(UARTE, inst, NRF_UARTE_regs[inst]., DMA_RX_END, STOPRX, DMA_RX_STOP) in nhw_UARTE_signal_EVENTS_ENDRX()
1266 nhw_UARTE_signal_EVENTS_ENDRX_noshort(inst); in nhw_UARTE_signal_EVENTS_ENDRX()
1269 static void nhw_UARTE_signal_EVENTS_ENDTX(unsigned int inst) { in nhw_UARTE_signal_EVENTS_ENDTX() argument
1271 NHW_SHORT_ST(UARTE, inst, NRF_UARTE_regs[inst]., DMA_TX_END, STOPTX, DMA_TX_STOP) in nhw_UARTE_signal_EVENTS_ENDTX()
1273 nhw_UARTE_signal_EVENTS_ENDTX_noshort(inst); in nhw_UARTE_signal_EVENTS_ENDTX()
1277 static void nhw_UARTE_signal_EVENTS_FRAMETIMEOUT(unsigned int inst) { in nhw_UARTE_signal_EVENTS_FRAMETIMEOUT() argument
1278 NHW_SHORT_ST(UARTE, inst, NRF_UARTE_regs[inst]., FRAMETIMEOUT, STOPRX, DMA_RX_STOP) in nhw_UARTE_signal_EVENTS_FRAMETIMEOUT()
1279 nhw_UARTE_signal_EVENTS_FRAMETIMEOUT_noshort(inst); in nhw_UARTE_signal_EVENTS_FRAMETIMEOUT()
1284 static void nhw_UARTE_signal_EVENTS_DMA_RX_MATCH(unsigned int inst, unsigned int i) { in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH() argument
1285 if (NRF_UARTE_regs[inst].SHORTS & (UARTE_SHORTS_DMA_RX_MATCH0_DMA_RX_ENABLEMATCH1_Msk << i)) { in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1286 nhw_UARTE_TASK_DMA_RX_ENABLEMATCH(inst, (i+1) % nhw_uarte_st[inst].n_match); in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1288 if (NRF_UARTE_regs[inst].SHORTS & (UARTE_SHORTS_DMA_RX_MATCH0_DMA_RX_DISABLEMATCH0_Msk << i)) { in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1289 nhw_UARTE_TASK_DMA_RX_ENABLEMATCH(inst, i); in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1292 NRF_UARTE_regs[inst].EVENTS_DMA.RX.MATCH[i] = 1; in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1293 nhw_UARTE_eval_interrupt(inst); in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1294 nhw_dppi_event_signal_if(nhw_uarte_st[inst].dppi_map, in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1295 NRF_UARTE_regs[inst].PUBLISH_DMA.RX.MATCH[i]); in nhw_UARTE_signal_EVENTS_DMA_RX_MATCH()
1299 NHW_SIDEEFFECTS_INTSET(UARTE, NRF_UARTE_regs[inst]., NRF_UARTE_regs[inst].INTEN)
1300 NHW_SIDEEFFECTS_INTCLR(UARTE, NRF_UARTE_regs[inst]., NRF_UARTE_regs[inst].INTEN)
1301 NHW_SIDEEFFECTS_INTEN(UARTE, NRF_UARTE_regs[inst]., NRF_UARTE_regs[inst].INTEN)
1306 NHW_SIDEEFFECTS_TASKS(UARTE, NRF_UARTE_regs[inst]., STARTRX) in NHW_SIDEEFFECTS_EVENTS()
1307 NHW_SIDEEFFECTS_TASKS(UARTE, NRF_UARTE_regs[inst]., STOPRX) in NHW_SIDEEFFECTS_EVENTS()
1308 NHW_SIDEEFFECTS_TASKS(UARTE, NRF_UARTE_regs[inst]., STARTTX) in NHW_SIDEEFFECTS_EVENTS()
1309 NHW_SIDEEFFECTS_TASKS(UARTE, NRF_UARTE_regs[inst]., STOPTX) in NHW_SIDEEFFECTS_EVENTS()
1311 NHW_SIDEEFFECTS_TASKS_ST(UARTE, NRF_UARTE_regs[inst]., STARTRX, DMA.RX.START) in NHW_SIDEEFFECTS_EVENTS()
1312 NHW_SIDEEFFECTS_TASKS_ST(UARTE, NRF_UARTE_regs[inst]., STOPRX, DMA.RX.STOP) in NHW_SIDEEFFECTS_EVENTS()
1313 NHW_SIDEEFFECTS_TASKS_ST(UARTE, NRF_UARTE_regs[inst]., STARTTX, DMA.TX.START) in NHW_SIDEEFFECTS_EVENTS()
1314 NHW_SIDEEFFECTS_TASKS_ST(UARTE, NRF_UARTE_regs[inst]., STOPTX, DMA.TX.STOP) in NHW_SIDEEFFECTS_EVENTS()
1317 void nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_ENABLEMATCH(uint inst, uint i) { in NHW_SIDEEFFECTS_EVENTS()
1318 if (NRF_UARTE_regs[inst].TASKS_DMA.RX.ENABLEMATCH[i]) { in NHW_SIDEEFFECTS_EVENTS()
1319 NRF_UARTE_regs[inst].TASKS_DMA.RX.ENABLEMATCH[i] = 0; in NHW_SIDEEFFECTS_EVENTS()
1320 nhw_UARTE_TASK_DMA_RX_ENABLEMATCH(inst, i); in NHW_SIDEEFFECTS_EVENTS()
1324 void nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH(uint inst, uint i) { in nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH() argument
1325 if (NRF_UARTE_regs[inst].TASKS_DMA.RX.DISABLEMATCH[i]) { in nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH()
1326 NRF_UARTE_regs[inst].TASKS_DMA.RX.DISABLEMATCH[i] = 0; in nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH()
1327 nhw_UARTE_TASK_DMA_RX_DISABLEMATCH(inst, i); in nhw_UARTE_regw_sideeffects_TASKS_DMA_RX_DISABLEMATCH()
1332 NHW_SIDEEFFECTS_TASKS(UARTE, NRF_UARTE_regs[inst]., FLUSHRX)
1335 void nhw_UARTE_regw_sideeffects_TASKS_SUSPEND(unsigned int inst) { in nhw_UARTE_regw_sideeffects_TASKS_SUSPEND() argument
1337 if ( NRF_UART_regs[inst]->TASKS_SUSPEND ) { in nhw_UARTE_regw_sideeffects_TASKS_SUSPEND()
1338 NRF_UART_regs[inst]->TASKS_SUSPEND = 0; in nhw_UARTE_regw_sideeffects_TASKS_SUSPEND()
1339 nhw_UARTE_TASK_SUSPEND(inst); in nhw_UARTE_regw_sideeffects_TASKS_SUSPEND()
1350 void nhw_UARTE_regw_sideeffects_SUBSCRIBE_##TASK_N(uint inst) \
1353 struct uarte_status *this = &nhw_uarte_st[inst]; \
1356 this->UARTE_regs[inst]->SUBSCRIBE_##TASK_ST_N,\
1357 &TASK_N##_subscribed[inst], \
1359 (void*) inst); \
1378 uint inst = (intptr_t)param >> 8; in NHW_UARTE_REGW_SIDEFFECTS_SUBSCRIBE() local
1380 nhw_UARTE_TASK_DMA_RX_ENABLEMATCH(inst, i); in NHW_UARTE_REGW_SIDEFFECTS_SUBSCRIBE()
1383 void nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_ENABLEMATCH(uint inst, uint i) in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_ENABLEMATCH() argument
1385 struct uarte_status *this = &nhw_uarte_st[inst]; in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_ENABLEMATCH()
1386 uint param = (inst << 8 || (i & 0xFF)); in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_ENABLEMATCH()
1389 this->UARTE_regs[inst]->SUBSCRIBE_DMA.RX.ENABLEMATCH[i], in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_ENABLEMATCH()
1397 uint inst = (intptr_t)param >> 8; in nhw_UARTE_TASK_nhw_UARTE_TASK_DMA_RX_DISABLEMATCH_wrap() local
1399 nhw_UARTE_TASK_DMA_RX_DISABLEMATCH(inst, i); in nhw_UARTE_TASK_nhw_UARTE_TASK_DMA_RX_DISABLEMATCH_wrap()
1402 void nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_DISABLEMATCH(uint inst, uint i) in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_DISABLEMATCH() argument
1404 struct uarte_status *this = &nhw_uarte_st[inst]; in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_DISABLEMATCH()
1405 uint param = (inst << 8 || (i & 0xFF)); in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_DISABLEMATCH()
1408 this->UARTE_regs[inst]->SUBSCRIBE_DMA.RX.DISABLEMATCH[i], in nhw_UARTE_regw_sideeffects_SUBSCRIBE_DMA_RX_DISABLEMATCH()