Searched refs:eight (Results 1 – 22 of 22) sorted by relevance
| /Zephyr-latest/drivers/pwm/ |
| D | Kconfig.it8xxx2 | 14 eight PWM channels each with 8-bit duty cycle.
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | Kconfig.rv32m1 | 15 eight channels; each channel has its own level 1 interrupt to
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| /Zephyr-latest/samples/subsys/canbus/isotp/ |
| D | README.rst | 12 a block-size (BS) of eight frames, and a short one that has a minimal
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| /Zephyr-latest/boards/renesas/rcar_spider_s4/doc/ |
| D | rcar_spider_a55.rst | 19 * eight 1.2GHz Arm Cortex-A55 cores, 2 cores x 4 clusters;
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| /Zephyr-latest/tests/benchmarks/thread_metric/ |
| D | Kconfig | 10 The Thread-Metric benchmark suite consists of eight RTOS tests.
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| /Zephyr-latest/boards/atmel/sam0/samc21n_xpro/doc/ |
| D | index.rst | 69 The SAMC21 MCU has eight SERCOM based USARTs with three configured as USARTs in
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| /Zephyr-latest/boards/silabs/dev_kits/sltb004a/doc/ |
| D | index.rst | 51 The EFR32MG12 SoC has eight gpio controllers (PORTA, PORTB, PORTC, PORTD,
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| /Zephyr-latest/boards/nxp/mimxrt1024_evk/doc/ |
| D | index.rst | 196 The MIMXRT1024 SoC has eight UARTs. One is configured for the console and the
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| /Zephyr-latest/boards/nxp/mimxrt1020_evk/doc/ |
| D | index.rst | 208 The MIMXRT1020 SoC has eight UARTs. ``LPUART1`` is configured for the console,
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| /Zephyr-latest/boards/nxp/mimxrt700_evk/doc/ |
| D | index.rst | 16 which is capable of processing up to eight 32x16 MACs per instruction cycle. It can be used for off…
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| /Zephyr-latest/boards/nxp/mimxrt1062_fmurt6/doc/ |
| D | index.rst | 241 The MIMXRT1062 SoC has eight UARTs. ``LPUART7`` is configured for the console,
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| /Zephyr-latest/boards/nxp/mimxrt595_evk/doc/ |
| D | index.rst | 37 - Support for up to eight off-board digital microphones via 12-pin header
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| /Zephyr-latest/boards/nxp/mimxrt685_evk/doc/ |
| D | index.rst | 34 - Support for up to eight off-board digital microphones via 12-pin header
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| /Zephyr-latest/boards/st/nucleo_h533re/doc/ |
| D | index.rst | 56 - Up to eight configurable SAU regions
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| /Zephyr-latest/boards/nxp/mimxrt1040_evk/doc/ |
| D | index.rst | 190 The MIMXRT1040 SoC has eight UARTs. ``LPUART1`` is configured for the console,
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| /Zephyr-latest/boards/nxp/mimxrt1064_evk/doc/ |
| D | index.rst | 307 The MIMXRT1064 SoC has eight UARTs. ``LPUART1`` is configured for the console
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| /Zephyr-latest/doc/hardware/peripherals/can/ |
| D | controller.rst | 124 This basic sample sends a CAN frame with standard identifier 0x123 and eight
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| /Zephyr-latest/boards/nxp/mimxrt1050_evk/doc/ |
| D | index.rst | 290 The MIMXRT1050 SoC has eight UARTs. ``LPUART1`` is configured for the console,
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| /Zephyr-latest/boards/ezurio/bl5340_dvk/doc/ |
| D | index.rst | 67 An eight-pin GPIO port expander is used to provide additional inputs
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| /Zephyr-latest/boards/nxp/mimxrt1060_evk/doc/ |
| D | index.rst | 315 The MIMXRT1060 SoC has eight UARTs. ``LPUART1`` is configured for the console,
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| /Zephyr-latest/scripts/ |
| D | spelling.txt | 590 eigth||eight
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| /Zephyr-latest/doc/releases/ |
| D | release-notes-2.5.rst | 1691 * :github:`28363` - ssd16xx: off-by-one with non-multiple-of-eight heights
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