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Searched refs:SERCOM4 (Results 1 – 13 of 13) sorted by relevance

/loramac-node-3.4.0/src/boards/SAMR34/
Dspi-board.c39 spi_m_sync_init( &Spi0, SERCOM4 ); in SpiInit()
41 hri_sercomspi_wait_for_sync( SERCOM4, SERCOM_SPI_SYNCBUSY_SWRST ); in SpiInit()
42 hri_sercomspi_set_CTRLA_SWRST_bit( SERCOM4 ); in SpiInit()
43 hri_sercomspi_wait_for_sync( SERCOM4, SERCOM_SPI_SYNCBUSY_SWRST ); in SpiInit()
45 … hri_sercomspi_write_CTRLA_reg( SERCOM4, SERCOM_SPI_CTRLA_MODE( 3 ) | SERCOM_SPI_CTRLA_DOPO( 1 ) ); in SpiInit()
47 hri_sercomspi_write_CTRLB_reg( SERCOM4, SERCOM_SPI_CTRLB_RXEN ); in SpiInit()
48 …hri_sercomspi_write_BAUD_reg( SERCOM4, ( ( float )CONF_GCLK_SERCOM4_CORE_FREQUENCY / ( float )( 2 … in SpiInit()
49 hri_sercomspi_write_DBGCTRL_reg( SERCOM4, 0 ); in SpiInit()
66 hri_sercomspi_set_CTRLA_ENABLE_bit( SERCOM4 ); in SpiInit()
80 while( ( SERCOM_SPI_INTFLAG_DRE & hri_sercomspi_read_INTFLAG_reg( SERCOM4 ) ) == 0 ) in SpiInOut()
[all …]
/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/
Dsaml21e15b.h419 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
538 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
541 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21e16b.h419 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
538 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
541 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21e17b.h419 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
538 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
541 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21e18b.h419 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
538 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
541 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21g16b.h419 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
538 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
541 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21g17b.h419 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
538 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
541 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21g18b.h419 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
538 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
541 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21j16b.h427 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
548 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
551 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21j17b.h427 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
548 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
551 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21j18b.h427 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
548 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
551 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
Dsaml21j18bu.h427 #define SERCOM4 (0x42001000) /**< \brief (SERCOM4) APB Base Address */ macro
548 #define SERCOM4 ((Sercom *)0x42001000UL) /**< \brief (SERCOM4) APB Base Address */ macro
551 #define SERCOM_INSTS { SERCOM0, SERCOM1, SERCOM2, SERCOM3, SERCOM4, SERCOM5 } /**< \brief (SER…
/loramac-node-3.4.0/src/boards/mcu/saml21/saml21b/include/component/
Dtal.h661 uint32_t SERCOM4:1; /*!< bit: 24 SERCOM4 Interrupt CPU Select */ member