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Searched refs:MPU_RASR_XN_Msk (Results 1 – 15 of 15) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_cortex.h193 #define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_cortex.h193 #define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_cortex.h182 #define LL_MPU_INSTRUCTION_ACCESS_DISABLE MPU_RASR_XN_Msk /*!< Instruction fetches disabled*/
/loramac-node-3.4.0/src/boards/mcu/saml21/cmsis/
Dcore_cm0plus.h558 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_sc000.h577 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_cm3.h1114 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_sc300.h1094 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_cm4.h1154 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_cm7.h1338 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
/loramac-node-3.4.0/src/boards/mcu/stm32/cmsis/
Dcore_cm0plus.h620 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_sc000.h631 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_cm3.h1195 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_sc300.h1177 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_cm4.h1256 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro
Dcore_cm7.h1461 #define MPU_RASR_XN_Msk (1UL << MPU_RASR_XN_Pos) /*!< MPU … macro