/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/ |
D | stm32l1xx_ll_cortex.h | 509 WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options)); in LL_MPU_Enable() 526 WRITE_REG(MPU->CTRL, 0U); in LL_MPU_Disable() 536 return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk)); in LL_MPU_IsEnabled() 556 WRITE_REG(MPU->RNR, Region); in LL_MPU_EnableRegion() 558 SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); in LL_MPU_EnableRegion() 602 WRITE_REG(MPU->RNR, Region); in LL_MPU_ConfigRegion() 604 WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U)); in LL_MPU_ConfigRegion() 606 WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos)); in LL_MPU_ConfigRegion() 627 WRITE_REG(MPU->RNR, Region); in LL_MPU_DisableRegion() 629 CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); in LL_MPU_DisableRegion()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/ |
D | stm32l4xx_ll_cortex.h | 509 WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options)); in LL_MPU_Enable() 526 WRITE_REG(MPU->CTRL, 0U); in LL_MPU_Disable() 536 return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk)); in LL_MPU_IsEnabled() 556 WRITE_REG(MPU->RNR, Region); in LL_MPU_EnableRegion() 558 SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); in LL_MPU_EnableRegion() 602 WRITE_REG(MPU->RNR, Region); in LL_MPU_ConfigRegion() 604 WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U)); in LL_MPU_ConfigRegion() 606 WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos)); in LL_MPU_ConfigRegion() 627 WRITE_REG(MPU->RNR, Region); in LL_MPU_DisableRegion() 629 CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); in LL_MPU_DisableRegion()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/ |
D | stm32l0xx_ll_cortex.h | 460 WRITE_REG(MPU->CTRL, (MPU_CTRL_ENABLE_Msk | Options)); in LL_MPU_Enable() 477 WRITE_REG(MPU->CTRL, 0U); in LL_MPU_Disable() 487 return (READ_BIT(MPU->CTRL, MPU_CTRL_ENABLE_Msk) == (MPU_CTRL_ENABLE_Msk)); in LL_MPU_IsEnabled() 507 WRITE_REG(MPU->RNR, Region); in LL_MPU_EnableRegion() 509 SET_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); in LL_MPU_EnableRegion() 553 WRITE_REG(MPU->RNR, Region); in LL_MPU_ConfigRegion() 555 WRITE_REG(MPU->RBAR, (Address & 0xFFFFFFE0U)); in LL_MPU_ConfigRegion() 557 WRITE_REG(MPU->RASR, (MPU_RASR_ENABLE_Msk | Attributes | SubRegionDisable << MPU_RASR_SRD_Pos)); in LL_MPU_ConfigRegion() 578 WRITE_REG(MPU->RNR, Region); in LL_MPU_DisableRegion() 580 CLEAR_BIT(MPU->RASR, MPU_RASR_ENABLE_Msk); in LL_MPU_DisableRegion()
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D | stm32l0xx_hal_cortex.h | 273 MPU->CTRL = 0; in HAL_MPU_Disable() 291 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in HAL_MPU_Enable()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Src/ |
D | stm32l1xx_hal_cortex.c | 310 MPU->CTRL = (MPU_Control | MPU_CTRL_ENABLE_Msk); in HAL_MPU_Enable() 327 MPU->CTRL = 0; in HAL_MPU_Disable() 343 MPU->RNR = MPU_Init->Number; in HAL_MPU_ConfigRegion() 357 MPU->RBAR = MPU_Init->BaseAddress; in HAL_MPU_ConfigRegion() 358 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | in HAL_MPU_ConfigRegion() 370 MPU->RBAR = 0x00; in HAL_MPU_ConfigRegion() 371 MPU->RASR = 0x00; in HAL_MPU_ConfigRegion()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Src/ |
D | stm32l4xx_hal_cortex.c | 449 MPU->CTRL = 0U; in HAL_MPU_Disable() 466 MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; in HAL_MPU_Enable() 489 MPU->RNR = MPU_Init->Number; in HAL_MPU_ConfigRegion() 503 MPU->RBAR = MPU_Init->BaseAddress; in HAL_MPU_ConfigRegion() 504 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | in HAL_MPU_ConfigRegion() 516 MPU->RBAR = 0x00; in HAL_MPU_ConfigRegion() 517 MPU->RASR = 0x00; in HAL_MPU_ConfigRegion()
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/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Src/ |
D | stm32l0xx_hal_cortex.c | 343 MPU->RNR = MPU_Init->Number; in HAL_MPU_ConfigRegion() 357 MPU->RBAR = (MPU_Init->BaseAddress) & 0xfffffff0U; in HAL_MPU_ConfigRegion() 360 MPU->RASR = ((uint32_t)MPU_Init->DisableExec << MPU_RASR_XN_Pos) | in HAL_MPU_ConfigRegion() 371 MPU->RBAR = 0x00U; in HAL_MPU_ConfigRegion() 372 MPU->RASR = 0x00U; in HAL_MPU_ConfigRegion()
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/loramac-node-3.4.0/src/boards/mcu/saml21/cmsis/ |
D | core_cm0plus.h | 616 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit … macro
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D | core_sc000.h | 636 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit … macro
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D | core_cm3.h | 1274 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit … macro
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D | core_sc300.h | 1254 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit … macro
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D | core_cm4.h | 1420 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit … macro
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D | core_cm7.h | 1607 …#define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit … macro
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/loramac-node-3.4.0/src/boards/mcu/stm32/cmsis/ |
D | core_cm0plus.h | 705 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
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D | core_sc000.h | 717 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
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D | core_cm3.h | 1384 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
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D | core_sc300.h | 1366 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
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D | core_cm4.h | 1553 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
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D | core_cm7.h | 1761 #define MPU ((MPU_Type *) MPU_BASE ) /*!< Memory Protection Unit */ macro
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/loramac-node-3.4.0/src/boards/NucleoL476/cmsis/arm-std/ |
D | startup_stm32l476xx.s | 78 DCD MemManage_Handler ; MPU Fault Handler
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