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Searched refs:CPUID (Results 1 – 18 of 18) sorted by relevance

/loramac-node-3.4.0/src/boards/mcu/saml21/hri/
Dhri_systemcontrol_l21.h74 ((Systemcontrol *)hw)->CPUID.reg |= SystemControl_CPUID_REVISION(mask); in hri_systemcontrol_set_CPUID_REVISION_bf()
82 tmp = ((Systemcontrol *)hw)->CPUID.reg; in hri_systemcontrol_get_CPUID_REVISION_bf()
91 tmp = ((Systemcontrol *)hw)->CPUID.reg; in hri_systemcontrol_write_CPUID_REVISION_bf()
94 ((Systemcontrol *)hw)->CPUID.reg = tmp; in hri_systemcontrol_write_CPUID_REVISION_bf()
101 ((Systemcontrol *)hw)->CPUID.reg &= ~SystemControl_CPUID_REVISION(mask); in hri_systemcontrol_clear_CPUID_REVISION_bf()
108 ((Systemcontrol *)hw)->CPUID.reg ^= SystemControl_CPUID_REVISION(mask); in hri_systemcontrol_toggle_CPUID_REVISION_bf()
115 tmp = ((Systemcontrol *)hw)->CPUID.reg; in hri_systemcontrol_read_CPUID_REVISION_bf()
123 ((Systemcontrol *)hw)->CPUID.reg |= SystemControl_CPUID_PARTNO(mask); in hri_systemcontrol_set_CPUID_PARTNO_bf()
131 tmp = ((Systemcontrol *)hw)->CPUID.reg; in hri_systemcontrol_get_CPUID_PARTNO_bf()
140 tmp = ((Systemcontrol *)hw)->CPUID.reg; in hri_systemcontrol_write_CPUID_PARTNO_bf()
[all …]
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L1xx_HAL_Driver/Inc/
Dstm32l1xx_ll_cortex.h444 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); in LL_CPUID_GetImplementer()
454 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); in LL_CPUID_GetVariant()
464 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); in LL_CPUID_GetConstant()
474 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); in LL_CPUID_GetParNo()
484 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); in LL_CPUID_GetRevision()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L4xx_HAL_Driver/Inc/
Dstm32l4xx_ll_cortex.h444 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); in LL_CPUID_GetImplementer()
454 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); in LL_CPUID_GetVariant()
464 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); in LL_CPUID_GetConstant()
474 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); in LL_CPUID_GetParNo()
484 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); in LL_CPUID_GetRevision()
/loramac-node-3.4.0/src/boards/mcu/stm32/STM32L0xx_HAL_Driver/Inc/
Dstm32l0xx_ll_cortex.h395 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_IMPLEMENTER_Msk) >> SCB_CPUID_IMPLEMENTER_Pos); in LL_CPUID_GetImplementer()
405 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_VARIANT_Msk) >> SCB_CPUID_VARIANT_Pos); in LL_CPUID_GetVariant()
415 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_ARCHITECTURE_Msk) >> SCB_CPUID_ARCHITECTURE_Pos); in LL_CPUID_GetArchitecture()
425 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_PARTNO_Msk) >> SCB_CPUID_PARTNO_Pos); in LL_CPUID_GetParNo()
435 return (uint32_t)(READ_BIT(SCB->CPUID, SCB_CPUID_REVISION_Msk) >> SCB_CPUID_REVISION_Pos); in LL_CPUID_GetRevision()
/loramac-node-3.4.0/src/boards/mcu/saml21/cmsis/
Dcore_cm0.h336 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register … member
Dcore_cm0plus.h347 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register … member
Dcore_sc000.h342 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register … member
Dcore_cm3.h350 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register … member
Dcore_sc300.h350 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register … member
Dcore_cm4.h397 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register … member
Dcore_cm7.h412 …__I uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register … member
/loramac-node-3.4.0/src/boards/mcu/stm32/cmsis/
Dcore_cm0.h391 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
Dcore_cm0plus.h405 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
Dcore_sc000.h397 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
Dcore_cm3.h419 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
Dcore_sc300.h419 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
Dcore_cm4.h487 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member
Dcore_cm7.h502 __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ member