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Searched refs:ctrl (Results 1 – 25 of 137) sorted by relevance

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/Zephyr-latest/subsys/sip_svc/
Dsip_svc_subsys.c132 STRUCT_SECTION_FOREACH(sip_svc_controller, ctrl) { in is_sip_svc_controller()
133 if ((void *)ctrl == ct) { in is_sip_svc_controller()
140 static uint32_t sip_svc_get_c_idx(struct sip_svc_controller *ctrl, uint32_t c_token) in sip_svc_get_c_idx() argument
144 if (!ctrl) { in sip_svc_get_c_idx()
148 for (i = 0; i < ctrl->num_clients; i++) { in sip_svc_get_c_idx()
149 if (ctrl->clients[i].token == c_token) { in sip_svc_get_c_idx()
166 struct sip_svc_controller *ctrl = (struct sip_svc_controller *)ct; in sip_svc_register() local
168 err = k_mutex_lock(&ctrl->data_mutex, K_FOREVER); in sip_svc_register()
174 c_idx = sip_svc_id_mgr_alloc(ctrl->client_id_pool); in sip_svc_register()
176 ctrl->clients[c_idx].id = c_idx; in sip_svc_register()
[all …]
Dsip_svc_shell.c22 static int parse_common_args(const struct shell *sh, char **argv, void **ctrl) in parse_common_args() argument
24 *ctrl = sip_svc_get_controller(argv[1]); in parse_common_args()
26 if (!*ctrl) { in parse_common_args()
31 struct sip_svc_controller *ct = (struct sip_svc_controller *)(*ctrl); in parse_common_args()
42 struct sip_svc_controller *ctrl; in cmd_reg() local
46 err = parse_common_args(sh, argv, (void **)&ctrl); in cmd_reg()
51 c_token = sip_svc_register(ctrl, NULL); in cmd_reg()
53 shell_error(sh, "%s: register fail", ctrl->method); in cmd_reg()
56 shell_print(sh, "%s: register success: client token %08x\n", ctrl->method, c_token); in cmd_reg()
65 struct sip_svc_controller *ctrl; in cmd_unreg() local
[all …]
/Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/
Dtimer.h53 uint32_t ctrl; in arm_arch_timer_set_compare() local
56 ctrl = sys_read32(TIMER_REG_GET(TIMER_CTRL)); in arm_arch_timer_set_compare()
57 ctrl &= ~(TIMER_COMP_ENABLE | TIMER_IRQ_ENABLE); in arm_arch_timer_set_compare()
58 sys_write32(ctrl, TIMER_REG_GET(TIMER_CTRL)); in arm_arch_timer_set_compare()
64 ctrl |= TIMER_COMP_ENABLE; in arm_arch_timer_set_compare()
65 sys_write32(ctrl, TIMER_REG_GET(TIMER_CTRL)); in arm_arch_timer_set_compare()
94 uint32_t ctrl; in arm_arch_timer_enable() local
96 ctrl = sys_read32(TIMER_REG_GET(TIMER_CTRL)); in arm_arch_timer_enable()
98 ctrl |= TIMER_ENABLE; in arm_arch_timer_enable()
100 ctrl &= ~TIMER_ENABLE; in arm_arch_timer_enable()
[all …]
/Zephyr-latest/include/zephyr/sip_svc/
Dsip_svc.h77 uint32_t sip_svc_register(void *ctrl, void *priv_data);
95 int sip_svc_unregister(void *ctrl, uint32_t c_token);
119 int sip_svc_open(void *ctrl, uint32_t c_token, k_timeout_t k_timeout);
135 int sip_svc_close(void *ctrl, uint32_t c_token, struct sip_svc_request *pre_close_req);
163 int sip_svc_send(void *ctrl, uint32_t c_token, struct sip_svc_request *req, sip_svc_cb_fn cb);
176 void *sip_svc_get_priv_data(void *ctrl, uint32_t c_token);
/Zephyr-latest/drivers/timer/
Dleon_gptimer.c27 uint32_t ctrl; member
72 uint32_t ctrl; in timer_isr() local
74 ctrl = tmr->ctrl; in timer_isr()
75 if ((ctrl & GPTIMER_CTRL_IP) == 0) { in timer_isr()
80 tmr->ctrl = GPTIMER_CTRL_IE | GPTIMER_CTRL_RS | in timer_isr()
103 tmr->ctrl = GPTIMER_CTRL_LD | GPTIMER_CTRL_RS | GPTIMER_CTRL_EN; in init_downcounter()
115 tmr->ctrl = GPTIMER_CTRL_IP; in sys_clock_driver_init()
116 if ((tmr->ctrl & GPTIMER_CTRL_IP) == 0) { in sys_clock_driver_init()
124 tmr->ctrl = GPTIMER_CTRL_IE | GPTIMER_CTRL_LD | GPTIMER_CTRL_RS | in sys_clock_driver_init()
Dsam0_rtc_timer.c284 uint16_t ctrl = RTC_MODE0_CTRL_MODE(0) | RTC_MODE0_CTRL_PRESCALER(0); in sys_clock_driver_init() local
286 uint16_t ctrl = RTC_MODE0_CTRLA_MODE(0) | RTC_MODE0_CTRLA_PRESCALER(0); in sys_clock_driver_init() local
290 ctrl |= RTC_MODE0_CTRLA_COUNTSYNC; in sys_clock_driver_init()
295 ctrl |= RTC_MODE0_CTRL_MATCHCLR; in sys_clock_driver_init()
297 ctrl |= RTC_MODE0_CTRLA_MATCHCLR; in sys_clock_driver_init()
302 RTC0->CTRL.reg = ctrl; in sys_clock_driver_init()
304 RTC0->CTRLA.reg = ctrl; in sys_clock_driver_init()
/Zephyr-latest/drivers/cache/
Dcache_aspeed.c135 uint32_t ctrl; in cache_data_invd_all() local
138 syscon_read_reg(dev, CACHE_FUNC_CTRL_REG, &ctrl); in cache_data_invd_all()
145 ctrl &= ~DCACHE_CLEAN; in cache_data_invd_all()
146 syscon_write_reg(dev, CACHE_FUNC_CTRL_REG, ctrl); in cache_data_invd_all()
149 ctrl |= DCACHE_CLEAN; in cache_data_invd_all()
150 syscon_write_reg(dev, CACHE_FUNC_CTRL_REG, ctrl); in cache_data_invd_all()
197 uint32_t ctrl; in cache_instr_invd_all() local
200 syscon_read_reg(dev, CACHE_FUNC_CTRL_REG, &ctrl); in cache_instr_invd_all()
207 ctrl &= ~ICACHE_CLEAN; in cache_instr_invd_all()
208 syscon_write_reg(dev, CACHE_FUNC_CTRL_REG, ctrl); in cache_instr_invd_all()
[all …]
/Zephyr-latest/drivers/serial/
Duart_apbuart.c75 uint32_t ctrl; /* 0x0008 */ member
239 uint32_t ctrl = 0; in apbuart_configure() local
275 ctrl = regs->ctrl; in apbuart_configure()
276 ctrl &= ~(APBUART_CTRL_PE | APBUART_CTRL_PS | APBUART_CTRL_FL); in apbuart_configure()
277 regs->ctrl = ctrl | newctrl; in apbuart_configure()
286 const uint32_t ctrl = regs->ctrl; in apbuart_config_get() local
289 if (ctrl & APBUART_CTRL_PE) { in apbuart_config_get()
290 if (ctrl & APBUART_CTRL_PS) { in apbuart_config_get()
298 if (ctrl & APBUART_CTRL_FL) { in apbuart_config_get()
363 regs->ctrl |= APBUART_CTRL_TF; in apbuart_irq_tx_enable()
[all …]
Duart_neorv32.c79 static inline void neorv32_uart_write_ctrl(const struct device *dev, uint32_t ctrl) in neorv32_uart_write_ctrl() argument
83 sys_write32(ctrl, config->base + NEORV32_UART_CTRL); in neorv32_uart_write_ctrl()
102 uint32_t ctrl; in neorv32_uart_poll_in() local
104 ctrl = neorv32_uart_read_ctrl(dev); in neorv32_uart_poll_in()
105 if ((ctrl & NEORV32_UART_CTRL_RX_NEMPTY) != 0U) { in neorv32_uart_poll_in()
130 uint32_t ctrl; in neorv32_uart_configure() local
197 ctrl = neorv32_uart_read_ctrl(dev); in neorv32_uart_configure()
198 ctrl |= NEORV32_UART_CTRL_EN; in neorv32_uart_configure()
201 ctrl |= NEORV32_UART_CTRL_HWFC_EN; in neorv32_uart_configure()
203 ctrl &= ~NEORV32_UART_CTRL_HWFC_EN; in neorv32_uart_configure()
[all …]
/Zephyr-latest/drivers/ethernet/
Deth_renesas_ra.c57 ether_instance_ctrl_t ctrl; member
154 (ether_extended_cfg_t *)ctx->ctrl.p_ether_cfg->p_extend; in renesas_ra_eth_buffer_init()
157 sizeof(ether_instance_descriptor_t) * ctx->ctrl.p_ether_cfg->num_rx_descriptors); in renesas_ra_eth_buffer_init()
159 sizeof(ether_instance_descriptor_t) * ctx->ctrl.p_ether_cfg->num_tx_descriptors); in renesas_ra_eth_buffer_init()
161 ether_init_buffers(&ctx->ctrl); in renesas_ra_eth_buffer_init()
171 p_reg_etherc = (R_ETHERC0_Type *)ctx->ctrl.p_reg_etherc; in phy_link_state_changed()
177 ctx->ctrl.link_change = ETHER_LINK_CHANGE_LINK_UP; in phy_link_state_changed()
178 ctx->ctrl.previous_link_status = ETHER_PREVIOUS_LINK_STATUS_UP; in phy_link_state_changed()
186 ether_configure_mac(&ctx->ctrl, ctx->ctrl.p_ether_cfg->p_mac_address, 0); in phy_link_state_changed()
191 ctx->ctrl.link_speed_duplex = ETHER_PHY_LINK_SPEED_100H; in phy_link_state_changed()
[all …]
/Zephyr-latest/soc/silabs/silabs_siwx91x/
Dsiwx91x_isp_prepare.py74 ctrl = 0
75 ctrl = set_bits(ctrl, 0, 24, ctrl_len)
76 ctrl = set_bits(ctrl, 24, 3, ctrl_reserved)
77 ctrl = set_bits(ctrl, 27, 1, ctrl_spi_32bitmode)
78 ctrl = set_bits(ctrl, 28, 1, ctrl_release_ta_softreset)
79 ctrl = set_bits(ctrl, 29, 1, ctrl_start_from_rom_pc)
80 ctrl = set_bits(ctrl, 30, 1, ctrl_spi_8bitmode)
81 ctrl = set_bits(ctrl, 31, 1, ctrl_last_entry)
82 return struct.pack("<II", ctrl, dest_addr)
/Zephyr-latest/tests/subsys/sip_svc/src/
Dmain.c55 void *ctrl; in sip_svc_send_sync_request() local
61 ctrl = sip_svc_get_controller(SVC_METHOD); in sip_svc_send_sync_request()
62 __ASSERT(ctrl != NULL, "couldn't get the controller"); in sip_svc_send_sync_request()
64 tot_time = (struct total_time *)sip_svc_get_priv_data(ctrl, token); in sip_svc_send_sync_request()
67 err = sip_svc_open(ctrl, token, K_FOREVER); in sip_svc_send_sync_request()
77 trans_id = sip_svc_send(ctrl, token, &req, get_sync_callback); in sip_svc_send_sync_request()
89 err = sip_svc_close(ctrl, token, NULL); in sip_svc_send_sync_request()
127 void *ctrl; in sip_svc_send_async_request() local
132 ctrl = sip_svc_get_controller(SVC_METHOD); in sip_svc_send_async_request()
133 __ASSERT(ctrl != NULL, "couldn't get the controller"); in sip_svc_send_async_request()
[all …]
/Zephyr-latest/samples/net/sockets/echo_client/src/
Dudp.c91 static void udp_control_init(struct udp_control *ctrl) in udp_control_init() argument
93 k_timer_init(&ctrl->rx_timer, wait_reply, NULL); in udp_control_init()
94 k_timer_init(&ctrl->tx_timer, wait_transmit, NULL); in udp_control_init()
95 k_poll_signal_init(&ctrl->tx_signal); in udp_control_init()
98 static void udp_control_access_grant(struct udp_control *ctrl) in udp_control_access_grant() argument
101 &ctrl->rx_timer, in udp_control_access_grant()
102 &ctrl->tx_timer, in udp_control_access_grant()
103 &ctrl->tx_signal); in udp_control_access_grant()
113 conf.ipv4.udp.ctrl = &udp4_ctrl; in init_udp()
118 conf.ipv6.udp.ctrl = &udp6_ctrl; in init_udp()
[all …]
/Zephyr-latest/drivers/i2c/
Di2c_mchp_mss.c134 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_configure() local
138 sys_write8((ctrl | PCLK_DIV_960), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_configure()
141 sys_write8((ctrl | PCLK_DIV_256), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_configure()
168 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_read() local
177 sys_write8((ctrl | CTRL_STA), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_read()
187 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_write() local
206 sys_write8((ctrl | CTRL_STA), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_write()
210 sys_write8((ctrl & ~CTRL_SI), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_write()
246 uint8_t ctrl = sys_read8(cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_reset() local
248 sys_write8((ctrl & ~CTRL_ENS1), cfg->i2c_base_addr + CORE_I2C_CTRL); in mss_i2c_reset()
[all …]
/Zephyr-latest/drivers/pcie/host/
Dptm.c28 union ptm_ctrl_reg ctrl; in pcie_ptm_root_setup() local
36 ctrl.ptm_enable = 1; in pcie_ptm_root_setup()
37 ctrl.root_select = 1; in pcie_ptm_root_setup()
39 pcie_conf_write(config->pcie->bdf, base + PTM_CTRL_REG_OFFSET, ctrl.raw); in pcie_ptm_root_setup()
76 union ptm_ctrl_reg ctrl; in DT_INST_FOREACH_STATUS_OKAY() local
90 ctrl.ptm_enable = 1; in DT_INST_FOREACH_STATUS_OKAY()
92 pcie_conf_write(bdf, base + PTM_CTRL_REG_OFFSET, ctrl.raw); in DT_INST_FOREACH_STATUS_OKAY()
/Zephyr-latest/tests/posix/xsi_streams/src/
Dmain.c12 const struct strbuf *ctrl = NULL; in ZTEST() local
15 int ret = putmsg(fd, ctrl, data, 0); in ZTEST()
42 struct strbuf *ctrl = NULL; in ZTEST() local
45 int ret = getmsg(fd, ctrl, data, 0); in ZTEST()
53 struct strbuf *ctrl = NULL; in ZTEST() local
56 int ret = getpmsg(fd, ctrl, data, 0, 0); in ZTEST()
/Zephyr-latest/drivers/entropy/
Dentropy_neorv32_trng.c46 static inline void neorv32_trng_write_ctrl(const struct device *dev, uint32_t ctrl) in neorv32_trng_write_ctrl() argument
50 sys_write32(ctrl, config->base + NEORV32_TRNG_CTRL); in neorv32_trng_write_ctrl()
62 uint32_t ctrl; in neorv32_trng_get_entropy() local
65 ctrl = neorv32_trng_read_ctrl(dev); in neorv32_trng_get_entropy()
67 if ((ctrl & NEORV32_TRNG_CTRL_AVAIL) != 0) { in neorv32_trng_get_entropy()
79 uint32_t ctrl; in neorv32_trng_get_entropy_isr() local
83 ctrl = neorv32_trng_read_ctrl(dev); in neorv32_trng_get_entropy_isr()
84 if ((ctrl & NEORV32_TRNG_CTRL_AVAIL) != 0) { in neorv32_trng_get_entropy_isr()
/Zephyr-latest/include/zephyr/dt-bindings/i2c/
Dnpcx-i2c.h10 #define NPCX_I2C_CTRL_PORT(ctrl, port) (((ctrl & 0xf) << 4) | (port & 0xf)) argument
/Zephyr-latest/drivers/rtc/
Drtc_ds3231.c101 static int rtc_ds3231_ctrl_to_buf(const struct rtc_ds3231_ctrl *ctrl, uint8_t *buf) in rtc_ds3231_ctrl_to_buf() argument
103 if (ctrl->en_alarm_1) { in rtc_ds3231_ctrl_to_buf()
107 if (ctrl->en_alarm_2) { in rtc_ds3231_ctrl_to_buf()
111 switch (ctrl->sqw_freq) { in rtc_ds3231_ctrl_to_buf()
125 if (ctrl->intctrl) { in rtc_ds3231_ctrl_to_buf()
131 if (ctrl->conv) { in rtc_ds3231_ctrl_to_buf()
135 if (!ctrl->en_osc) { /* active low */ in rtc_ds3231_ctrl_to_buf()
140 static int rtc_ds3231_modify_ctrl(const struct device *dev, const struct rtc_ds3231_ctrl *ctrl, in rtc_ds3231_modify_ctrl() argument
146 int err = rtc_ds3231_ctrl_to_buf(ctrl, &buf); in rtc_ds3231_modify_ctrl()
162 static int rtc_ds3231_ctrl_sts_to_buf(const struct rtc_ds3231_ctrl_sts *ctrl, uint8_t *buf) in rtc_ds3231_ctrl_sts_to_buf() argument
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_shell.c169 static int get_gpio_pin(const struct shell *sh, const struct gpio_ctrl *ctrl, char *line_name) in get_gpio_pin() argument
175 for (i = 0; i < ctrl->ngpios && i < ctrl->line_names_len; i++) { in get_gpio_pin()
176 result = line_cmp(line_name, ctrl->line_names[i]); in get_gpio_pin()
178 if ((BIT64(i) & ctrl->reserved_mask) != 0) { in get_gpio_pin()
200 const struct gpio_ctrl *ctrl; in get_sh_gpio() local
204 ctrl = get_gpio_ctrl(argv[ARGV_DEV]); in get_sh_gpio()
205 if (ctrl == NULL) { in get_sh_gpio()
209 gpio->dev = ctrl->dev; in get_sh_gpio()
212 pin = get_gpio_pin(sh, ctrl, argv[ARGV_PIN]); in get_sh_gpio()
216 } else if ((BIT64(pin) & ctrl->reserved_mask) != 0) { in get_sh_gpio()
[all …]
/Zephyr-latest/samples/drivers/led/led_strip/boards/
Dblueclover_plt_demo_v2_nrf52832.overlay8 led_pwr: led-pwr-ctrl {
10 regulator-name = "led-pwr-ctrl";
/Zephyr-latest/boards/nordic/thingy52/
Dthingy52_nrf52832.dts76 vdd_pwr: vdd-pwr-ctrl {
78 regulator-name = "vdd-pwr-ctrl";
84 spk_pwr: spk-pwr-ctrl {
86 regulator-name = "spk-pwr-ctrl";
90 mpu_pwr: mpu-pwr-ctrl {
92 regulator-name = "mpu-pwr-ctrl";
97 mic_pwr: mic-pwr-ctrl {
99 regulator-name = "mic-pwr-ctrl";
104 ccs_pwr: ccs-pwr-ctrl {
106 regulator-name = "ccs-pwr-ctrl";
/Zephyr-latest/drivers/spi/
Dspi_grlib_spimctrl.c19 uint32_t ctrl; member
120 regs->ctrl |= (CTRL_USRC | CTRL_IEN); in transceive()
121 regs->ctrl &= ~CTRL_CSN; in transceive()
134 regs->ctrl |= CTRL_CSN; in transceive()
135 regs->ctrl &= ~CTRL_USRC; in transceive()
180 regs->ctrl &= ~CTRL_IEN; in spim_isr()
198 regs->ctrl = CTRL_CSN; in init()
Dspi_mchp_mss_qspi.c165 uint32_t count, ctrl, wdata; in mss_qspi_transmit_x32() local
167 ctrl = mss_qspi_read(s, MSS_QSPI_REG_CONTROL); in mss_qspi_transmit_x32()
168 ctrl |= MSS_QSPI_CONTROL_FLAGSX4; in mss_qspi_transmit_x32()
169 mss_qspi_write(s, ctrl, MSS_QSPI_REG_CONTROL); in mss_qspi_transmit_x32()
187 uint32_t count, ctrl, temp; in mss_qspi_receive_x32() local
189 ctrl = mss_qspi_read(s, MSS_QSPI_REG_CONTROL); in mss_qspi_receive_x32()
190 ctrl |= MSS_QSPI_CONTROL_FLAGSX4; in mss_qspi_receive_x32()
191 mss_qspi_write(s, ctrl, MSS_QSPI_REG_CONTROL); in mss_qspi_receive_x32()
379 uint32_t ctrl = mss_qspi_read(s, MSS_QSPI_REG_CONTROL); in mss_qspi_hw_mode_set() local
383 ctrl |= MSS_QSPI_CONTROL_CLKIDLE; in mss_qspi_hw_mode_set()
[all …]
/Zephyr-latest/drivers/watchdog/
Dwdt_rpi_pico.c52 hw_clear_bits(&watchdog_hw->ctrl, WATCHDOG_CTRL_ENABLE_BITS); in wdt_rpi_pico_setup()
64 hw_clear_bits(&watchdog_hw->ctrl, in wdt_rpi_pico_setup()
68 hw_set_bits(&watchdog_hw->ctrl, in wdt_rpi_pico_setup()
83 hw_set_bits(&watchdog_hw->ctrl, WATCHDOG_CTRL_ENABLE_BITS); in wdt_rpi_pico_setup()
102 ticks_hw->ticks[TICK_WATCHDOG].ctrl = TICKS_WATCHDOG_CTRL_ENABLE_BITS; in wdt_rpi_pico_setup()
116 hw_clear_bits(&watchdog_hw->ctrl, WATCHDOG_CTRL_ENABLE_BITS); in wdt_rpi_pico_disable()

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