Home
last modified time | relevance | path

Searched refs:b (Results 1 – 23 of 23) sorted by relevance

/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dtie-asm.h272 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
273 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
274 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
275 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
276 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
277 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
278 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
279 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
280 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
281 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore.h99 #define XCHAL__2(a,b, x, ...) x argument
100 #define XCHAL__3(a,b,c, x, ...) x argument
101 #define XCHAL__4(a,b,c,d, x, ...) x argument
102 #define XCHAL__5(a,b,c,d,e, x, ...) x argument
103 #define XCHAL__6(a,b,c,d,e,f, x, ...) x argument
104 #define XCHAL__7(a,b,c,d,e,f,g, x, ...) x argument
105 #define XCHAL__8(a,b,c,d,e,f,g,h, x, ...) x argument
106 #define XCHAL__9(a,b,c,d,e,f,g,h,i, x, ...) x argument
107 #define XCHAL__10(a,b,c,d,e,f,g,h,i,j, x, ...) x argument
108 #define XCHAL__11(a,b,c,d,e,f,g,h,i,j,k, x, ...) x argument
[all …]
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dtie-asm.h295 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
296 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
297 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
298 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
299 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
300 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
301 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
302 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
303 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
304 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dtie-asm.h298 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
299 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
300 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
301 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
302 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
303 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
304 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
305 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
306 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
307 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dtie-asm.h300 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
301 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
302 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
303 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
304 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
305 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
306 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
307 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
308 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
309 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dtie-asm.h302 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
303 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
304 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
305 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
306 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
307 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
308 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
309 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
310 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
311 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dtie-asm.h300 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
301 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
302 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
303 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
304 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
305 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
306 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
307 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
308 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
309 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dtie-asm.h302 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
303 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
304 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
305 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
306 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
307 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
308 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
309 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
310 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
311 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/include/xtensa/
Dmpuasm.h64 bltu \a_temp2, \a_temp3, 1b
85 j 2b
107 bnez \a_temp1, 1b // loop until done
Dcacheattrasm.h122 bgeui a3, 16, 1b
337 beq a3, a6, 1b // current PC's region? if so, do it in a safe way
340 bgeui a3, 16, 2b
376 bgeui a3, 16, 2b
Dhal.h122 #define XTHAL_FUZZY_AND(a,b) (((a)==0 || (b)==0) ? 0 : ((a)==1 && (b)==1) ? 1 : XTHAL_MAYBE) argument
123 #define XTHAL_FUZZY_OR(a,b) (((a)==1 || (b)==1) ? 1 : ((a)==0 && (b)==0) ? 0 : XTHAL_MAYBE) argument
Dcoreasm.h224 floopend_ \ar, 8b, 9
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dtie-asm.h371 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
372 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
373 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
374 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
375 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
376 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
377 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
378 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
379 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
380 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dtie-asm.h368 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
369 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
370 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
371 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
372 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
373 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
374 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
375 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
376 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
377 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dtie-asm.h357 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
358 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
359 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
360 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
361 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
362 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
363 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
364 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
365 .macro xchal_cp6_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
366 .macro xchal_cp6_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dtie-asm.h357 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
358 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
359 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
360 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
361 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
362 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
363 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
364 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
365 .macro xchal_cp6_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
366 .macro xchal_cp6_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dtie-asm.h357 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
358 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
359 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
360 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
361 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
362 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
363 .macro xchal_cp5_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
364 .macro xchal_cp5_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
365 .macro xchal_cp6_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
366 .macro xchal_cp6_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/include/xtensa/config/
Dcore.h1089 .macro xchal_cp0_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
1090 .macro xchal_cp0_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
1093 .macro xchal_cp1_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
1094 .macro xchal_cp1_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
1097 .macro xchal_cp2_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
1098 .macro xchal_cp2_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
1101 .macro xchal_cp3_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
1102 .macro xchal_cp3_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
1105 .macro xchal_cp4_store p a b c d continue=0 ofs=-1 select=-1 ; .endm
1106 .macro xchal_cp4_load p a b c d continue=0 ofs=-1 select=-1 ; .endm
[all …]
/hal_xtensa-latest/src/hal/
Dmp_asm.S62 beqz a4, 1b
76 bne a4, a5, 1b // retry if *address != ~SCOMPARE1
Dmemcopy.S32 # define BL(b,l) b argument
34 # define BL(b,l) l argument
Dmpu.c727 static unsigned max(unsigned a, unsigned b, unsigned c) in max() argument
729 if (a > b && a > c) in max()
731 else if (b > c) in max()
732 return b; in max()
1706 inline static unsigned int max2(unsigned int a, unsigned int b) in max2() argument
1708 if (a>b) in max2()
1711 return b; in max2()
Dwindowspill_asm.S324 bbci.l a2, WSBITS-1, 1b // repeat until ms start bit set
/hal_xtensa-latest/
Dconfigure2984 rm -f -r a.out a.out.dSYM a.exe conftest$ac_cv_exeext b.out