| /hal_xtensa-latest/src/hal/ |
| D | interrupts.c | 116 unsigned enablemap[XCHAL_NUM_INTLEVELS+1][16];
127 unsigned resolvemap[XCHAL_NUM_INTLEVELS][16];
160 const unsigned char Xthal_num_intlevels = XCHAL_NUM_INTLEVELS;
252 #if XCHAL_NUM_INTLEVELS >= 1
255 #if XCHAL_NUM_INTLEVELS >= 2
258 #if XCHAL_NUM_INTLEVELS >= 3
261 #if XCHAL_NUM_INTLEVELS >= 4
264 #if XCHAL_NUM_INTLEVELS >= 5
267 #if XCHAL_NUM_INTLEVELS >= 6
270 #if XCHAL_NUM_INTLEVELS >= 7
[all …]
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| D | int_asm.S | 40 #define XTHAL_VPRI_RESOLVEMAP_OFS (0x10+0x40*(XCHAL_NUM_INTLEVELS+1))
41 #define XTHAL_VPRI_END_OFS (0x10+0x40*(XCHAL_NUM_INTLEVELS*2+1))
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| /hal_xtensa-latest/include/xtensa/ |
| D | xtruntime.h | 181 #if XCHAL_NUM_INTLEVELS >= 1
184 #if XCHAL_NUM_INTLEVELS >= 2
187 #if XCHAL_NUM_INTLEVELS >= 3
190 #if XCHAL_NUM_INTLEVELS >= 4
193 #if XCHAL_NUM_INTLEVELS >= 5
196 #if XCHAL_NUM_INTLEVELS >= 6
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| D | xtruntime-core-state.h | 72 #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI >= 2
73 STRUCT_AFIELD(long,4,CS_SA_,epc, XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI - 1)
74 STRUCT_AFIELD(long,4,CS_SA_,eps, XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI - 1)
75 STRUCT_AFIELD(long,4,CS_SA_,excsave,XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI - 1)
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| /hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/ |
| D | core-isa.h | 236 #define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/ |
| D | core-isa.h | 338 #define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/ |
| D | core-isa.h | 338 #define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/ |
| D | core-isa.h | 338 #define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/ |
| D | core-isa.h | 361 #define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/ |
| D | core-isa.h | 357 #define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/ |
| D | core-isa.h | 326 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/ |
| D | core-isa.h | 326 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/ |
| D | core-isa.h | 449 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/ |
| D | core-isa.h | 449 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/ |
| D | core-isa.h | 421 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/ |
| D | core-isa.h | 353 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/ |
| D | core-isa.h | 428 #define XCHAL_NUM_INTLEVELS 6 /* number of interrupt levels macro
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| D | core.h | 277 # define XCHAL_NMILEVEL (XCHAL_NUM_INTLEVELS+1)
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| /hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/ |
| D | core-isa.h | 449 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/ |
| D | core-isa.h | 464 #define XCHAL_NUM_INTLEVELS 4 /* number of interrupt levels macro
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| /hal_xtensa-latest/include/xtensa/config/ |
| D | core.h | 240 # define XCHAL_NMILEVEL (XCHAL_NUM_INTLEVELS+1)
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