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Searched refs:XCHAL_INTLEVEL2_ANDBELOW_MASK (Results 1 – 18 of 18) sorted by relevance

/hal_xtensa-latest/src/hal/
Dinterrupts.c256 DEFAULT_ENABLEMAP(XCHAL_INTLEVEL1_ANDBELOW_MASK,XCHAL_INTLEVEL2_ANDBELOW_MASK),
259 DEFAULT_ENABLEMAP(XCHAL_INTLEVEL2_ANDBELOW_MASK,XCHAL_INTLEVEL3_ANDBELOW_MASK),
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h252 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x001F81FF macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h354 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x000000FF macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h354 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x000000FF macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h354 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x000000FF macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h377 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x000000FF macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h373 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x001F81FF macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h342 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x7FFFFFF4 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h342 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x7FFFFFF4 macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h468 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x0000001F macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h468 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x0000001F macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h440 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x01FBFFFF macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h369 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x00FFFFC6 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h447 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x005F81FF macro
Dcore.h260 XCHAL_SEP XCHAL_INTLEVEL2_ANDBELOW_MASK \
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h469 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x00FFFFE6 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h483 #define XCHAL_INTLEVEL2_ANDBELOW_MASK 0x00FFFFE6 macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h223 XCHAL_SEP XCHAL_INTLEVEL2_ANDBELOW_MASK \