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Searched refs:XCHAL_INT8_LEVEL (Results 1 – 18 of 18) sorted by relevance

/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h268 #define XCHAL_INT8_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h370 #define XCHAL_INT8_LEVEL 3 macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h370 #define XCHAL_INT8_LEVEL 3 macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h370 #define XCHAL_INT8_LEVEL 3 macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h393 #define XCHAL_INT8_LEVEL 3 macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h389 #define XCHAL_INT8_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h358 #define XCHAL_INT8_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h358 #define XCHAL_INT8_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h484 #define XCHAL_INT8_LEVEL 5 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h484 #define XCHAL_INT8_LEVEL 5 macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h456 #define XCHAL_INT8_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h385 #define XCHAL_INT8_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h463 #define XCHAL_INT8_LEVEL 2 macro
Dcore.h289 XCHAL_SEP XCHAL_INT8_LEVEL \
403 # define XCHAL_INT8_LEVEL 0 macro
/hal_xtensa-latest/src/hal/
Dinterrupts.c317 DEFAULT_INTVPRI( XCHAL_INT8_LEVEL ),
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h485 #define XCHAL_INT8_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h499 #define XCHAL_INT8_LEVEL 1 macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h252 XCHAL_SEP XCHAL_INT8_LEVEL \
372 # define XCHAL_INT8_LEVEL 0 macro