Home
last modified time | relevance | path

Searched refs:XCHAL_INT1_LEVEL (Results 1 – 18 of 18) sorted by relevance

/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h261 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h363 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h363 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h363 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h386 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h382 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h351 #define XCHAL_INT1_LEVEL 3 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h351 #define XCHAL_INT1_LEVEL 3 macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h477 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h477 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h449 #define XCHAL_INT1_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h378 #define XCHAL_INT1_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h456 #define XCHAL_INT1_LEVEL 1 macro
Dcore.h282 XCHAL_SEP XCHAL_INT1_LEVEL \
375 # define XCHAL_INT1_LEVEL 0 macro
/hal_xtensa-latest/src/hal/
Dinterrupts.c310 DEFAULT_INTVPRI( XCHAL_INT1_LEVEL ),
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h478 #define XCHAL_INT1_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h492 #define XCHAL_INT1_LEVEL 2 macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h245 XCHAL_SEP XCHAL_INT1_LEVEL \
344 # define XCHAL_INT1_LEVEL 0 macro