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Searched refs:XCHAL_INT12_LEVEL (Results 1 – 16 of 16) sorted by relevance

/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h272 #define XCHAL_INT12_LEVEL 4 macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h374 #define XCHAL_INT12_LEVEL 4 macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h374 #define XCHAL_INT12_LEVEL 4 macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h374 #define XCHAL_INT12_LEVEL 4 macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h397 #define XCHAL_INT12_LEVEL 4 macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h393 #define XCHAL_INT12_LEVEL 4 macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h362 #define XCHAL_INT12_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h362 #define XCHAL_INT12_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h460 #define XCHAL_INT12_LEVEL 2 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h389 #define XCHAL_INT12_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h467 #define XCHAL_INT12_LEVEL 4 macro
Dcore.h293 XCHAL_SEP XCHAL_INT12_LEVEL \
419 # define XCHAL_INT12_LEVEL 0 macro
/hal_xtensa-latest/src/hal/
Dinterrupts.c321 DEFAULT_INTVPRI( XCHAL_INT12_LEVEL ),
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h489 #define XCHAL_INT12_LEVEL 1 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h503 #define XCHAL_INT12_LEVEL 1 macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h256 XCHAL_SEP XCHAL_INT12_LEVEL \
388 # define XCHAL_INT12_LEVEL 0 macro