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Searched refs:XCHAL_INST_FETCH_WIDTH (Results 1 – 17 of 17) sorted by relevance

/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h115 #define XCHAL_INST_FETCH_WIDTH 4 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h193 #define XCHAL_INST_FETCH_WIDTH 8 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h193 #define XCHAL_INST_FETCH_WIDTH 8 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h193 #define XCHAL_INST_FETCH_WIDTH 8 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h193 #define XCHAL_INST_FETCH_WIDTH 8 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h186 #define XCHAL_INST_FETCH_WIDTH 4 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h166 #define XCHAL_INST_FETCH_WIDTH 16 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h166 #define XCHAL_INST_FETCH_WIDTH 16 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h228 #define XCHAL_INST_FETCH_WIDTH 16 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h228 #define XCHAL_INST_FETCH_WIDTH 16 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h221 #define XCHAL_INST_FETCH_WIDTH 16 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h191 #define XCHAL_INST_FETCH_WIDTH 16 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h219 #define XCHAL_INST_FETCH_WIDTH 4 /* instr-fetch width in bytes */ macro
Dcore.h841 #if XCHAL_INST_FETCH_WIDTH > XCHAL_DATA_WIDTH
842 # define XCHAL_ALIGN_MAX XCHAL_INST_FETCH_WIDTH
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h226 #define XCHAL_INST_FETCH_WIDTH 8 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h228 #define XCHAL_INST_FETCH_WIDTH 16 /* instr-fetch width in bytes */ macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h938 #if XCHAL_INST_FETCH_WIDTH > XCHAL_DATA_WIDTH
939 # define XCHAL_ALIGN_MAX XCHAL_INST_FETCH_WIDTH