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Searched refs:XCHAL_ICACHE_SETWIDTH (Results 1 – 18 of 18) sorted by relevance

/hal_xtensa-latest/src/hal/
Dcache.c38 const unsigned char Xthal_icache_setwidth = XCHAL_ICACHE_SETWIDTH;
/hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/
Dcore-isa.h189 #define XCHAL_ICACHE_SETWIDTH 7 macro
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h287 #define XCHAL_ICACHE_SETWIDTH 6 macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h287 #define XCHAL_ICACHE_SETWIDTH 6 macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h287 #define XCHAL_ICACHE_SETWIDTH 7 macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h287 #define XCHAL_ICACHE_SETWIDTH 6 macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h280 #define XCHAL_ICACHE_SETWIDTH 0 macro
/hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/
Dcore-isa.h257 #define XCHAL_ICACHE_SETWIDTH 7 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/
Dcore-isa.h257 #define XCHAL_ICACHE_SETWIDTH 7 macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h365 #define XCHAL_ICACHE_SETWIDTH 7 macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h365 #define XCHAL_ICACHE_SETWIDTH 7 macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h358 #define XCHAL_ICACHE_SETWIDTH 6 macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h285 #define XCHAL_ICACHE_SETWIDTH 6 macro
/hal_xtensa-latest/include/xtensa/config/
Dcore.h786 #define XCHAL_ICACHE_SETSIZE (1<<XCHAL_ICACHE_SETWIDTH)
789 #if XCHAL_ICACHE_SETWIDTH > XCHAL_DCACHE_SETWIDTH
790 # define XCHAL_CACHE_SETWIDTH_MAX XCHAL_ICACHE_SETWIDTH
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h344 #define XCHAL_ICACHE_SETWIDTH 0 macro
Dcore.h683 #define XCHAL_ICACHE_SETSIZE (UINT32_C(1) << XCHAL_ICACHE_SETWIDTH)
686 #if XCHAL_ICACHE_SETWIDTH > XCHAL_DCACHE_SETWIDTH
687 # define XCHAL_CACHE_SETWIDTH_MAX XCHAL_ICACHE_SETWIDTH
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h365 #define XCHAL_ICACHE_SETWIDTH 5 macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h363 #define XCHAL_ICACHE_SETWIDTH 0 macro