| /hal_xtensa-latest/src/hal/ |
| D | set_region_translate.c | 25 #if XCHAL_HAVE_XEA2 && (!XCHAL_HAVE_MPU)
125 #if XCHAL_HAVE_XEA2 in xthal_set_region_translation_raw()
168 #if XCHAL_HAVE_XEA2 in xthal_v2p()
399 #if XCHAL_HAVE_XEA2 & !XCHAL_HAVE_MPU in xthal_set_region_translation()
518 #if XCHAL_HAVE_XEA2 & !XCHAL_HAVE_MPU in xthal_invalidate_region()
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| /hal_xtensa-latest/include/xtensa/ |
| D | xtruntime.h | 84 #elif XCHAL_HAVE_XEA2
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| D | coreasm.h | 824 #elif XCHAL_HAVE_XEA2
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| /hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/ |
| D | core.h | 210 #if (XCHAL_HAVE_XEA1 || XCHAL_HAVE_XEA2)
582 #if (XCHAL_HAVE_XEA1 || XCHAL_HAVE_XEA2)
823 #if XCHAL_HAVE_MPU && XCHAL_HAVE_LX && XCHAL_HAVE_XEA2
1325 # define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor) ( ((major) < 1040 && XCHAL_HAVE_XEA2) ? 0 \
1329 : (XTHAL_REL_LE(major,minor, 1040,0) && XCHAL_HAVE_XEA2) ? 1 \
1331 # define XCHAL_HW_RELEASE_AT(major,minor) ( (((major) < 1040 && XCHAL_HAVE_XEA2) || \
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| D | core-isa.h | 609 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/ |
| D | core-isa.h | 377 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/include/xtensa/config/ |
| D | core.h | 545 #define XCHAL_HAVE_EXCM XCHAL_HAVE_XEA2 /* (DEPRECATED) 1 if PS.EXCM bit exists (currently equals…
1395 # define XCHAL_HW_RELEASE_AT_OR_BELOW(major,minor) ( ((major) < 1040 && XCHAL_HAVE_XEA2) ? 0 \
1399 : (XTHAL_REL_LE(major,minor, 1040,0) && XCHAL_HAVE_XEA2) ? 1 \
1401 # define XCHAL_HW_RELEASE_AT(major,minor) ( (((major) < 1040 && XCHAL_HAVE_XEA2) || \
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| /hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/ |
| D | core-isa.h | 474 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/ |
| D | core-isa.h | 474 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/ |
| D | core-isa.h | 474 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/ |
| D | core-isa.h | 497 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/ |
| D | core-isa.h | 516 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/ |
| D | core-isa.h | 524 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/ |
| D | core-isa.h | 524 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/ |
| D | core-isa.h | 576 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/ |
| D | core-isa.h | 574 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/ |
| D | core-isa.h | 606 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/ |
| D | core-isa.h | 551 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/ |
| D | core-isa.h | 671 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/ |
| D | core-isa.h | 685 #define XCHAL_HAVE_XEA2 1 /* Exception Architecture 2 */ macro
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