| /hal_xtensa-latest/src/hal/ |
| D | set_region_translate.c | 126 #if XCHAL_HAVE_XLT_CACHEATTR || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_set_region_translation_raw()
297 #if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY in is_writeback()
400 #if XCHAL_HAVE_XLT_CACHEATTR || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_set_region_translation()
419 #if (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_set_region_translation()
519 #if (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_invalidate_region()
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| D | mmu.c | 36 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY in xthal_static_v2p()
69 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY in xthal_static_p2v()
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| D | attribute.c | 177 #elif XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY in xthal_set_region_attribute()
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| D | misc.c | 91 const unsigned char Xthal_have_spanning_way = XCHAL_HAVE_SPANNING_WAY;
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| D | cache_asm.S | 247 …HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY)
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| /hal_xtensa-latest/include/xtensa/ |
| D | xtruntime-core-state.h | 157 # if XCHAL_HAVE_SPANNING_WAY /* MMU v3 */
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| D | cacheattrasm.h | 39 || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY))
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| /hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/ |
| D | core-isa.h | 455 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/ |
| D | core-isa.h | 575 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/ |
| D | core-isa.h | 575 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/ |
| D | core-isa.h | 575 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/ |
| D | core-isa.h | 598 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/ |
| D | core-isa.h | 611 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/ |
| D | core-isa.h | 613 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/ |
| D | core-isa.h | 613 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/ |
| D | core-isa.h | 668 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/ |
| D | core-isa.h | 666 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/ |
| D | core-isa.h | 692 #define XCHAL_HAVE_SPANNING_WAY 0 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/ |
| D | core-isa.h | 640 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/ |
| D | core-isa.h | 707 #define XCHAL_HAVE_SPANNING_WAY 0 /* one way maps I+D 4GB vaddr */ macro
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| D | core.h | 802 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY
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| /hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/ |
| D | core-isa.h | 763 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/ |
| D | core-isa.h | 778 #define XCHAL_HAVE_SPANNING_WAY 1 /* one way maps I+D 4GB vaddr */ macro
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| /hal_xtensa-latest/include/xtensa/config/ |
| D | core.h | 902 #if XCHAL_HAVE_TLBS && !XCHAL_HAVE_SPANNING_WAY && XCHAL_ITLB_ARF_WAYS > 0 && XCHAL_DTLB_ARF_WAYS >…
912 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY
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