| /hal_xtensa-latest/src/hal/ |
| D | set_region_translate.c | 126 #if XCHAL_HAVE_XLT_CACHEATTR || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_set_region_translation_raw()
182 #if !XCHAL_HAVE_PTP_MMU in xthal_v2p()
275 # if XCHAL_HAVE_PTP_MMU
297 #if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY in is_writeback()
400 #if XCHAL_HAVE_XLT_CACHEATTR || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_set_region_translation()
419 #if (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_set_region_translation()
519 #if (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY) in xthal_invalidate_region()
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| D | mmu.c | 36 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY in xthal_static_v2p()
69 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY in xthal_static_p2v()
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| D | attribute.c | 177 #elif XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY in xthal_set_region_attribute()
181 # if XCHAL_HAVE_PTP_MMU in xthal_set_region_attribute()
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| D | cache_asm.S | 247 #elif XCHAL_HAVE_MIMIC_CACHEATTR || XCHAL_HAVE_XLT_CACHEATTR || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_S…
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| /hal_xtensa-latest/include/xtensa/ |
| D | cacheattrasm.h | 39 || (XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY))
141 #if XCHAL_HAVE_PTP_MMU
149 #if XCHAL_HAVE_PTP_MMU
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| D | xtruntime-core-state.h | 141 #if XCHAL_HAVE_PTP_MMU
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| /hal_xtensa-latest/zephyr/soc/dc233c/xtensa/config/ |
| D | core-isa.h | 461 #define XCHAL_HAVE_PTP_MMU 1 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/ |
| D | core-isa.h | 581 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/ |
| D | core-isa.h | 581 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/ |
| D | core-isa.h | 581 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/ |
| D | core-isa.h | 604 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/ |
| D | core-isa.h | 617 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/mimx8ml8/xtensa/config/ |
| D | core-isa.h | 619 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx_adsp/xtensa/config/ |
| D | core-isa.h | 619 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/ |
| D | core-isa.h | 674 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/ |
| D | core-isa.h | 672 #define XCHAL_HAVE_PTP_MMU 1 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/ |
| D | core-isa.h | 697 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/ |
| D | core-isa.h | 646 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/include/xtensa/config/ |
| D | core.h | 903 # define XCHAL_HAVE_PTP_MMU 1 /* have full MMU (with page table [autorefill] and protection) */
905 # define XCHAL_HAVE_PTP_MMU 0 /* don't have full MMU */
912 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY
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| /hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/ |
| D | core-isa.h | 712 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| D | core.h | 802 #if XCHAL_HAVE_PTP_MMU && !XCHAL_HAVE_SPANNING_WAY
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| /hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/ |
| D | core-isa.h | 784 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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| /hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/ |
| D | core-isa.h | 769 #define XCHAL_HAVE_PTP_MMU 0 /* full MMU (with page table macro
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