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Searched refs:XCHAL_HAVE_EXCLUSIVE (Results 1 – 14 of 14) sorted by relevance

/hal_xtensa-latest/src/hal/
Dmp_asm.S54 #if XCHAL_HAVE_EXCLUSIVE
/hal_xtensa-latest/zephyr/soc/intel_cnl_adsp/xtensa/config/
Dcore-isa.h73 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/intel_icl_adsp/xtensa/config/
Dcore-isa.h73 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/intel_apl_adsp/xtensa/config/
Dcore-isa.h73 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/intel_tgl_adsp/xtensa/config/
Dcore-isa.h73 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller/xtensa/config/
Dcore-isa.h71 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace15_mtpm/xtensa/config/
Dcore-isa.h71 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/intel_ace30_ptl/xtensa/config/
Dcore-isa.h71 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/mt8195_adsp/xtensa/config/
Dcore-isa.h71 #define XCHAL_HAVE_EXCLUSIVE 1 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/nxp_imx8ulp_adsp/xtensa/config/
Dcore-isa.h71 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/sample_controller32/xtensa/config/
Dcore-isa.h72 #define XCHAL_HAVE_EXCLUSIVE 1 /* L32EX/S32EX instructions */ macro
Dcore.h857 #define XCHAL_HAVE_ATOMCTL (XCHAL_HAVE_EXCLUSIVE || \
/hal_xtensa-latest/zephyr/soc/nxp_rt600_adsp/xtensa/config/
Dcore-isa.h71 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro
/hal_xtensa-latest/zephyr/soc/nxp_rt500_adsp/xtensa/config/
Dcore-isa.h71 #define XCHAL_HAVE_EXCLUSIVE 0 /* L32EX/S32EX instructions */ macro