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Searched refs:VIMS_O_CTL (Results 1 – 11 of 11) sorted by relevance

/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/driverlib/
Dvims.c69 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSConfigure()
81 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSConfigure()
102 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSModeSet()
106 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSModeSet()
Dvims.h300 HWREG(ui32Base + VIMS_O_CTL) |= VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufDisable()
322 HWREG(ui32Base + VIMS_O_CTL) &= ~(VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufEnable()
Dsetup_rom.c901 …vimsCtlMode0 = (( HWREG( VIMS_BASE + VIMS_O_CTL ) & ~VIMS_CTL_MODE_M ) | VIMS_CTL_DYN_CG_EN_M | VI… in SetupSetCacheModeAccordingToCcfgSetting()
906 HWREG( VIMS_BASE + VIMS_O_CTL ) = ( vimsCtlMode0 | VIMS_CTL_MODE_CACHE ); in SetupSetCacheModeAccordingToCcfgSetting()
910 HWREG( VIMS_BASE + VIMS_O_CTL ) = ( vimsCtlMode0 | VIMS_CTL_MODE_OFF ); in SetupSetCacheModeAccordingToCcfgSetting()
914 HWREG( VIMS_BASE + VIMS_O_CTL ) = vimsCtlMode0; in SetupSetCacheModeAccordingToCcfgSetting()
917 HWREG( VIMS_BASE + VIMS_O_CTL ) = vimsCtlMode0; in SetupSetCacheModeAccordingToCcfgSetting()
/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/driverlib/
Dvims.c69 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSConfigure()
81 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSConfigure()
102 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSModeSet()
106 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSModeSet()
Dvims.h300 HWREG(ui32Base + VIMS_O_CTL) |= VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufDisable()
322 HWREG(ui32Base + VIMS_O_CTL) &= ~(VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufEnable()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/driverlib/
Dvims.c71 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSConfigure()
83 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSConfigure()
104 ui32Reg = HWREG(ui32Base + VIMS_O_CTL); in VIMSModeSet()
108 HWREG(ui32Base + VIMS_O_CTL) = ui32Reg; in VIMSModeSet()
Dvims.h302 HWREG(ui32Base + VIMS_O_CTL) |= VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufDisable()
324 HWREG(ui32Base + VIMS_O_CTL) &= ~(VIMS_CTL_IDCODE_LB_DIS_M | in VIMSLineBufEnable()
Dsetup_rom.c903 …vimsCtlMode0 = (( HWREG( VIMS_BASE + VIMS_O_CTL ) & ~VIMS_CTL_MODE_M ) | VIMS_CTL_DYN_CG_EN_M | VI… in SetupSetCacheModeAccordingToCcfgSetting()
908 HWREG( VIMS_BASE + VIMS_O_CTL ) = ( vimsCtlMode0 | VIMS_CTL_MODE_CACHE ); in SetupSetCacheModeAccordingToCcfgSetting()
912 HWREG( VIMS_BASE + VIMS_O_CTL ) = ( vimsCtlMode0 | VIMS_CTL_MODE_OFF ); in SetupSetCacheModeAccordingToCcfgSetting()
916 HWREG( VIMS_BASE + VIMS_O_CTL ) = vimsCtlMode0; in SetupSetCacheModeAccordingToCcfgSetting()
919 HWREG( VIMS_BASE + VIMS_O_CTL ) = vimsCtlMode0; in SetupSetCacheModeAccordingToCcfgSetting()
/hal_ti-latest/simplelink/source/ti/devices/cc13x2_cc26x2/inc/
Dhw_vims.h50 #define VIMS_O_CTL 0x00000004 macro
/hal_ti-latest/simplelink/source/ti/devices/cc13x2x7_cc26x2x7/inc/
Dhw_vims.h50 #define VIMS_O_CTL 0x00000004 macro
/hal_ti-latest/simplelink_lpf3/source/ti/devices/cc23x0r5/inc/
Dhw_vims.h449 #define VIMS_O_CTL 0x00000004 macro